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Datasheet: ZR36067 (Zoran (OAK))

av Pci Controller

 

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February 1998
ZORAN Corporation
T
3112 Scott Blvd
T
Santa Clara, CA 95054
T
(408) 919-4111
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FAX (408) 919-4122
DATA SHEET
ZR36067
AV PCI CONTROLLER
FEATURES
T
Supersedes the Zoran ZR36057.
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Glueless interface to PCI bus (PCI spec. 2.1 compliant).
T
Minimum interface to JPEG decoders (ZR36060,
ZR36050+ZR36016), MPEG1 and DVD decoders
(ZR36110, ZR36700), video decoders and video encoders.
T
Bidirectional DMA transfer of compressed data up to 11M
bytes/sec.
T
DMA transfer of video and mask information.
T
Support for fast still image compression and decompression.
T
Smooth image down-scaler (up to 5-tap horizontal filter).
T
On-chip pixel accurate masking.
T
YUV-to-RGB converter with quantization noise reduction by
error diffusion.
T
Video output: 15- and 16-bit RGB pixel formats, as well as
24-bit (packed and unpacked), and YUV 4:2:2.
T
Hardware support for non-contiguous JPEG code buffers.
T
Graceful recovery from extreme bus latencies both on video
and code transfers.
T
Choice of emulated interlaced video display, or single field
display, to eliminate motion artifacts.
T
Hardware support for simple, cost effective frame grabbing.
T
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2
C bus master port.
T
Plug & Play support.
T
208-pin PQFP package.
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Support for Subsystem ID and Subsystem Vendor ID.
APPLICATIONS
T
High quality video and audio capture/playback and editing
boards for PCI systems.
T
Multimedia/Graphics subsystems using a secondary PCI
bus.
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PCI motherboards with multimedia capability.
T
JPEG/MPEG1 solutions for PowerPC and Macintosh PCI
systems.
Video Decoder
Audio Control
Audio FIFO
Audio Codec
ZR36060
ZR36067
Video Encoder
Graphics
Sub-System
PCI Bus
Figure 1. Block Diagram of a Typical Motion JPEG System for PCI
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AV PCI CONTROLLER
CONTENTS
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
The ZR36067 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
JPEG System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Motion Video Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Motion Video Decompression . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Still Image Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Still Image Decompression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Notations and Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Digital Video Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Digital Video Front End (VFE). . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Video Input Processor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pixel Formatting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Video DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Pixel Bursts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Display Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Frame Grabbing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Overlay Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Host Control/Communication Services . . . . . . . . . . . . . . . . .9
Application-Specific Registers (ASRs) . . . . . . . . . . . . . . . . . . . . . 9
GuestBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PostOffice Handshaking Protocol . . . . . . . . . . . . . . . . . . . . . . . . . 9
Still Transfer Mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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2
C Port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Interrupt Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Code DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
MPEG Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
JPEG Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PCI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Digital Video Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Sampling The Incoming Video . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Synchronization Signal Generation . . . . . . . . . . . . . . . . . . . . . . . 11
ZR36067 Connection To ZR36060 Video Interface . . . . . . . . . . 12
Pixel Transfer In Still Image Compression Mode . . . . . . . . . . . . 13
Pixel Transfer In Still Image Decompression Mode . . . . . . . . . . 13
GuestBus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Flexible GuestBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Code-Write Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Doubleword to Bytes Mapping in Code-Write Operations. . . . . . 14
PostOffice Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
GuestBus Wait States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PostOffice Handshaking Protocol . . . . . . . . . . . . . . . . . . . .15
Host Writes to a Guest Device . . . . . . . . . . . . . . . . . . . . . . . . . 15
Host Reads from a Guest Device . . . . . . . . . . . . . . . . . . . . . . . 15
Codec Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Compression Mode Code Transactions . . . . . . . . . . . . . . . . . . . 16
Decompression Mode Code Transactions . . . . . . . . . . . . . . . . . 16
Code Bus Stalling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Connecting ZR36067 To ZR36060 Host and Code Interfaces . . 17
I2C Bus Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
General Purpose I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . .17
Interrupt Requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Video Input Processor . . . . . . . . . . . . . . . . . . . . . . . 18
Horizontal Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Horizontal/Vertical Downscaler . . . . . . . . . . . . . . . . . . . . . . 18
Color Space Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Video Output Control . . . . . . . . . . . . . . . . . . . . . . . . 19
Display Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Frame Grabbing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Output Pixel Organization . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Graphics Overlay. . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
JPEG Code Transfer . . . . . . . . . . . . . . . . . . . . . . . . . 20
The Code Buffer Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Fragment Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
JPEG Compression Modes . . . . . . . . . . . . . . . . . . . . . . . . . 21
JPEG Decompression Modes . . . . . . . . . . . . . . . . . . . . . . . 21
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
JPEG P_reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Subsystem ID And Subsystem Vendor ID . . . . . . . 23
Subsystem ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Subsystem Vendor ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PCI Configuration Space Registers. . . . . . . . . . . . . 24
Application-Specific Registers (ASRs) . . . . . . . . . . 25
Video Front End Horizontal Configuration Register . . . . . . 25
Video Front End Vertical Configuration Register. . . . . . . . . 25
Video Front End, Scaler and Pixel Format Register . . . . . . 26
Video Display "Top" Register . . . . . . . . . . . . . . . . . . . . . . . 27
Video Display "Bottom" Register . . . . . . . . . . . . . . . . . . . . . 27
Video Stride, Status and Frame Grab Register . . . . . . . . . . 27
Video Display Configuration Register . . . . . . . . . . . . . . . . . 27
Masking Map "Top" Register . . . . . . . . . . . . . . . . . . . . . . . . 28
Masking Map "Bottom" Register . . . . . . . . . . . . . . . . . . . . . 28
Overlay Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
System, PCI and General Purpose Pins Control Register . 29
General Purpose Pins and GuestBus Control Register (I) . 29
MPEG Code Source Address Register . . . . . . . . . . . . . . . . 29
MPEG Code Transfer Control Register . . . . . . . . . . . . . . . . 30
MPEG Code Memory Pointer Register . . . . . . . . . . . . . . . . 31
Interrupt Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Interrupt Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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C-Bus Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PostOffice Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
JPEG Mode and Control . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
JPEG Process Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Vertical Sync Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Horizontal Sync Parameters . . . . . . . . . . . . . . . . . . . . . . . . 34
Field Horizontal Active Portion . . . . . . . . . . . . . . . . . . . . . . 34
Field Vertical Active Portion . . . . . . . . . . . . . . . . . . . . . . . . 34
Field Process Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 34
JPEG Code Base Address . . . . . . . . . . . . . . . . . . . . . . . . . 34
JPEG Code FIFO Threshold . . . . . . . . . . . . . . . . . . . . . . . . 34
JPEG Codec Guest ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
GuestBus Control Register (II) . . . . . . . . . . . . . . . . . . . . . . 35
"Still Transfer" Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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AV PCI CONTROLLER
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . 36
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . 36
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
AC Timing Specifications. . . . . . . . . . . . . . . . . . . . . .37
PCI Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Video Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
GuestBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Codec Bus Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Appendix A:
ZR36110
-
ZR36067
Interface 44
ZR36110 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Mapping the
ZR36110 on the ZR36067's GuestBus . . . . . . . 44
ZR36110 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
On-Line Commands and Status . . . . . . . . . . . . . . . . . . . . . . 44
Bitstream Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Appendix B: MD207/MD208 -
ZR36067
Interface 45
MD207/208 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Mapping the MD207/208 on the
ZR36067's GuestBus . . . . . 45
Sync Polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Vertical Interpolation with the MD208 . . . . . . . . . . . . . . . . . . 45
Appendix C: Fitting the Input Size to the Required Display Window 46
Calculating the Horizontal Parameters:. . . . . . . . . . . . . . . . . . . . . . . . 47
Calculating the Vertical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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AV PCI CONTROLLER
1.0 INTRODUCTION
1.1 The ZR36067
The ZR36067 is a PCI adapter intended for multimedia applica-
tions on PCI systems. It supports high rate code (compressed
data stream) transfer between the system memory and JPEG or
MPEG processors. Simultaneously to the code transfer, the
ZR36067 captures digital video, such as decompressed MJPEG
(Motion JPEG), MPEG, or the output of a video decoder, and
creates a scaled video window in the graphics display memory.
The ZR36067 provides the host software with full control over a
large number of non-PCI multimedia devices:
Motion JPEG Codecs - ZR36050+ ZR36016, ZR36060
Audio codecs
MPEG and DVD decoders - ZR36110, ZR36700
I2C devices, such as video decoders, video encoders, etc.
The ZR36067 interfaces directly to the PCI bus. As a bus
master, it transfers data (e.g, JPEG compressed data) to or from
the system memory, and writes digital video pixels to the
graphics display memory. As a bus target, the ZR36067 reflects
the host accesses onto a micro-controller-type 8-bit "Guest Bus".
The ZR36067 has a special "Still Transfer" port by means of
which the host software writes (or reads) digitized video, as RGB
pixels, from the system memory to (or from) the video bus. This
path enables fast transfer of still images to be compressed (or
decompressed) by the JPEG chip set.
The ZR36067 supersedes the ZR36057 PCI Bus Multimedia
Controller and is recommended for all new designs. The
ZR36067 has the same package, pinout and functions and the
ZR36057, with the following exceptions:
The ZR36067 supports programmable PCI Subsystem ID
and Subsystem Vendor ID. These ID registers get their val-
ues by sampling the state of existing pins of the ZR36067
(Video bus, Guest bus and GPIO pins) at PCI Reset time.
Thus, the values can be programmed by means of pull-up or
pull-down resistors on these pins. Note that the Subsystem
ID and Subsystem Vendor ID registers of the ZR36057 are
hard wired to 0.
Two functional bugs of the ZR36057, documented in its data
sheet, have been corrected in the ZR36067 and work-
arounds are no longer required.
1.2 JPEG System Overview
Figure 1 depicts an example of an MJPEG add-on board, using
the ZR36067 and ZR36060.
The ZR36067 supports 4 basic JPEG modes of operation:
Motion Video Compression.
Motion Video Decompression.
Still Image Compression.
Still Image Decompression.
1.2.1 Motion Video Compression
The video decoder directs the video in YUV 4:2:2 format, and the
video synchronization signals, to the video input port of the
ZR36060. The video is also transferred to the video encoder for
display on a TV monitor and simultaneously to the Video Front
End of the ZR36067. The ZR36067 can optionally down-scale
the video, convert it to RGB, and transfer the pixels using DMA
to the display memory of the host PC. In parallel, the ZR36060
performs the JPEG compression. The ZR36050 drives the
JPEG code stream to the Codec Front End of the ZR36067,
which transfers the compressed video fields using DMA to a
system memory buffer allocated by the host.
1.2.2 Motion Video Decompression
In Motion Video Decompression, the ZR36067 transfers the
code stream from system memory via the ZR36067 Codec Front
End to the ZR36060, using DMA. The ZR36060 decompresses
the JPEG code and transfers the video to the video encoder to
be displayed on a TV monitor. The ZR36060 video output is
driven simultaneously to the Video Front End of the ZR36067 to
be processed, as in the compression mode, and transferred
using DMA to the PC display memory.
1.2.3 Still Image Compression
In Still Image Compression mode an image bitmap is written by
the host, pixel by pixel, through the PCI bus to the ZR36067. The
ZR36067 transfers the pixels through its video bus port to the
video input port of the ZR36060. The ZR36067 generates and
drives the required video synchronization signals for the
ZR36060 in this mode. After the first strip of 8 video lines is filled,
the ZR36060 starts performing the raster-to-block operation and
compressing the data, and drives the code stream to the
ZR36067. The code stream is transferred using DMA to the host
memory as in Motion Video Compression.
1.2.4 Still Image Decompression
In Still Image Decompression mode, the ZR36067 fetches the
code stream from system memory using DMA, as in Motion
Video Decompression. The ZR36060 reads the compressed
data from the ZR36067, decodes it and send the decompressed
video to the video port of the ZR36067. From there the host
software reads it out to system memory, pixel by pixel.
Note that still image decompression can also be accomplished
by configuring the ZR36067 in Motion Video Decompression
mode, and transferring the decompressed video to a contiguous
buffer in system memory instead of the display memory. Since
this has a speed advantage over Still Image Decompression
mode, it is the preferred method for most applications.
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AV PCI CONTROLLER
1. In this document, an overbar is used to denote active low signals. In other documents referenced herein, such as the PCI specifications, the # suffix notation is often
used instead. The two forms of notation are interchangeable. Thus, for example, DEVSEL is equivalent to DEVSEL#.
1.2.5 Notations and Conventions
External signals:
Capital letters (e.g., IDSEL)
Active-low mark
[1]
:
Overbar (e.g., DEVSEL)
Internal function units:
capital (non-bold) letters (e.g., VFE)
Buses:
XXmsb_index..lsb_index (e.g., AD31..0)
Register fields:
XXmsb_index:lsb_index (e.g., Mode27:16)
Register types:
R - read only
RC - read-clear. Writing `1' clears the register bit.
RS - read-set. Writing `1' sets the register bit to `1'.
RW - read-write (contents of write can be read back)
W - write only (contents of read are meaningless)
Numbers:
Unmarked numbers are decimal (e.g., 365, 23.19). Hexadecimal numbers are marked with a `0x' prefix (e.g., 0xB000,
0x3). Binary numbers are marked with a `b' suffix (e.g., 010b, 0000110100011b).
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