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expansion, including:
- Quantization
- Variable length coding/decoding
- JPEG markers including restart (RST), application (APP),
capability for CCIR resolution (720 x 480)
- Support for inexpensive memories
- Requires minimal host intervention
cessor that performs the algorithm specified by the JPEG
Baseline and JPEG Lossless standards for high-quality image
compression and expansion of continuous-tone color or mono-
chrome images. The ZR36050 performs Discrete Cosine
Transform (DCT), quantization and variable-length encoding for
image compression (coding), and the corresponding inverse
operations for expansion (decoding).
performs the DCT operation on 8 x 8 blocks of image data, con-
verting image data into its spatial frequency components, and
quantizes them using a user defined "quantization table."
spatial frequencies, these higher frequency components can be
quantized more coarsely than the lower-frequency components,
with negligible effect on image quality.
long strings of zero valued quantized coefficients, when the 8x8
blocks are scanned in zigzag order. The scanned coefficients
are characterized in terms of their nonzero values and the zero
run lengths. As a result, a long string of zeroes is coded as a
single number. The ZR36050 then performs Huffman coding
using user-defined Huffman tables, whereby bit patterns of dif-
ferent lengths code the nonzero values (values that occur
frequently use the shortest codes; while those that infrequently
the amount of memory needed to store an image.
inverse of the Huffman and the zigzag modified-run-length
coding), and dequantized. A 2-D inverse Discrete Cosine Trans-
form is performed on the DCT coefficients, resulting in an
expanded image.
Data Interface
subset of JPEG Lossless standard. The ZR36050 performs one
dimensional differential prediction followed by variable-length
encoding for JPEG Lossless compression, and the correspond-
ing inverse operations for JPEG Lossless expansion.
Baseline standard. The unique ability to perform bit rate control.
Bit rate control capability allows the user to preset the size of a
compressed image file. This capability is important because
without bit rate control, the size of a compressed image is highly
data dependent for a given set of quantization tables (images
with fine detail generate considerably larger files than files gen-
erated from smooth images).
where predictable file sizes for compressed images is desired, or
where the time allocated to transmit an image across a commu-
nications network is fixed. The compressed image file size is
constrained to be no greater than a user specified target, and is
typically kept within a range of 95% to 100% of this target. The
bit rate control feature relies on a two pass algorithm for its
operation.
an image for "Fast Preview." This thumbnail image is a 1/64
scale version of the image, and is generated up to 25 times
faster than full image expansion. The thumbnail image is gener-
ated from the JPEG Baseline compressed data, and eliminates
the need for a separately encoded and stored thumbnail image.
of images.
minimal host intervention. The host processor controls the oper-
ation of the device by writing parameter values into the
ZR36050's Internal Memory. Once initialized, the ZR36050
operates continuously until it has completed the compression or
expansion of the image. Since the ZR36050 fully complies with
the JPEG Baseline standard, the compressed data bit-stream
generally requires no intervention by the host. Full JPEG capa-
bility also allows for the interchange of files created by other
JPEG imaging systems with files generated by systems using
the ZR36050.
cations. For example, a typical multimedia application (30 seconds of
video at 10 frames/sec and 320 x 240 resolution) would require 69
Mbytes of storage in uncompressed form. With compression using the
ZR36050, the requirement can be reduced to 2.9 Mbytes, making
storage feasible on a personal computer hard disk. Similarly, for digital
still camera applications, the memory requirement can be reduced
from a 22 Mbyte hard disk to a 1 Mbyte memory card for storage of
twenty 768 x 480 compressed images.
technology, making it suitable for use in low-power, cost-sensi-
tive applications. The device is available in a 100-pin Plastic
Quad Flat Pack (PQFP).
edge of this clock.
state. RESET can be activated only when CLKEN is asserted and must remain active for a minimum
of four CLK_IN cycles.
bits except the END bit are reset; the END bit is set. RESET initializes the ZR36050 to the compres-
sion mode, and activates END, STOP and COMP.
long as RESET is active.
only the internal clock circuit consumes power. If CLKEN is inactive in the Standby state, the device
power consumption is further reduced.
of a RESET and prior to loading the Internal Memory, or after the ZR36050 issues an END. If CLKEN
is active, then STDBY should be deasserted at least four CLK_IN cycles before accessing the Internal
Memory.
writing to the Internal Memory during the Standby state is prohibited.
PLL that generates an internal double-frequency clock. When inactive, this signal reduces power
further in the Standby state by deactivating the internal clock. The frequency of CLK_IN must be
stable before CLKEN is activated. Furthermore, 5000 CLK_IN cycles are required for the PLL to sta-
bilize, after CLKEN has been activated and before the device is ready for operation.
ed. When STDBY is high, this pin should also be high. For systems in which the 5000 CLK_IN
recovery time is not significant, the STDBY and CLKEN pins can be tied together to the external
standby signal.
edge of CLK_IN. Immediately after FREEZE is sampled, all buses float and all activities of the
ZR36050 are frozen in their current state. All activities resume normally following the deassertion of
FREEZE.
process. If an encoding process ends because of an overflow, END is not activated.
process. It stays activated until a GO command is issued or the STATUS_1 register in the Internal
Memory is read.
2. The control pins: DSYNC, EOS, STOP, END, CL, CSYNC, COE, CWE, CCS, CAEN, INT, DINT, DREQ and COMP, have internal pull-up
is active together with RESET, the above control pins float.
that is being decoded.
01 - Second MCU component.
10 - Third MCU component.
11 - Fourth MCU component or Idle.
component or with the falling edge of EOS.
precedes the DC coefficient value and the pixel data, respectively.
decoding modes. STOP is used for the following purposes:
ZR36050 is not ready to receive image data. STOP is activated when the ZR36050 is in the Idle state,
and when reading or processing Internal Memory parameters during the encoding modes.
coefficient buffers are full. In this case, STOP is output 42 CLK_IN cycles prior to the last image data
sample of the current block that is being input. If STOP remains active until the next DSYNC is due,
then the system must not input the next DSYNC and the image data block. STOPs that are deacti-
vated prior to the next DSYNC can be ignored. The system can resume inputting the next image data
block immediately after STOP is deactivated.
activation of STOP to prevent overflow.
next DSYNC and consequently delay output of the next decoded image data block at the end of the
current block. In this case, STOP must be activated at least 24 CLK_IN cycles before the last image
sample of the current block that is being output and must remain active at least until the end of the
current block. Once STOP is deactivated, the ZR36050 outputs the next DSYNC followed by its cor-
responding image data block, at least 17 CLK_IN cycles after deactivation of STOP.
ZR36050 stops or resumes delivering image data after 2 CLK_IN cycles.
ing 4 bits are "don't care" and can be left as unconnected pins.
most significant bits of the bus are used to carry the input image data.
significant 4 bits are forced to "0".
most significant bits of the bus are used to carry the output image data and the unused bits are forced
to "0".
the most significant 11 bits of the bus. The least significant bit is forced to "0".
blocks. In the Lossless encoding and decoding modes, the image data is scanned row by row.
2. The control pins: DSYNC, EOS, STOP, END, CL, CSYNC, COE, CWE, CCS, CAEN, INT, DINT, DREQ and COMP, have internal pull-up
is active together with RESET, the above control pins float.
input one CLK_IN before the first image data of a block. In the decoding modes, DSYNC is output
one CLK_IN before the first image data sample of a block. The width of DSYNC is one CLK_IN cycle.
each image data sample.
sample of each scan entering the ZR36050. In encoding modes, EOS must be input regardless of the
STOP signal.
sample of each scan leaving the ZR36050. In this case, DSYNC will not be issued.
last sample of a scan. It is merely used in as an indication of the completion of the current process
without having any timing significance.
encoding and decoding modes. The DCT coefficients are output in column-major order. This bus is
not used in the Fast Preview and Lossless encoding and decoding modes.
block.
CLK_IN cycle before the first coefficient of a block is placed on the COEF bus by the ZR36050. The
width of CSYNC is one CLK_IN cycle.
pressed data from or write to the Compressed Data Memory.
ZR36050 to the Compressed Data Memory. COE goes active 0.5 CLK_IN cycles after the start of a
read cycle and remains active until the end of the read cycle. The CODE bus is latched on the rising
edge of COE.
ZR36050 to the Compressed Data Memory. CWE goes active 0.5 CLK_IN cycles after the start of a
write cycle and remains active until the end of the write cycle.
the ZR36050 to the Compressed Data Memory. CCS goes active at the start of a read or write cycle
and remains active throughout the cycle. CCS remains active continuously in back to back read or
write cycles. The length of a read or write cycle can be from one to eight CLK_IN periods.
pressed Data Memory address counter.
2. The control pins: DSYNC, EOS, STOP, END, CL, CSYNC, COE, CWE, CCS, CAEN, INT, DINT, DREQ and COMP, have internal pull-up
is active together with RESET, the above control pins float.
