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Datasheet: MA838 (Zarlink Semiconductor Inc.)

Single Phase Pulse Width Modulation Waveform Generator

 

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Zarlink Semiconductor Inc.
Obsolescence Notice






This product is obsolete.
This information is available for your
convenience only.

For more information on
Zarlink's obsolete products and
replacement product lists, please visit
http://products.zarlink.com/obsolete_products/
1
MA838
MA838 FAMILY
SINGLE PHASE PULSE WIDTH MODULATION
WAVEFORM GENERATOR
JULY 1995
DS3798-3.1
The MA838 PWM generator has been designed to provide
waveforms for the control of variable speed AC machines,
uninterruptible power supplies and other forms of power
electronic devices which require pulse width modulation as a
means of efficient power control.
Two TTL level PWM outputs control the upper and lower
switches in an inverter arm. This is usually via an external
isolation and amplification stage.
Information contained within the pulse width modulated
sequences controls the wave shape, power frequency and
amplitude of the output waveform. Parameters such as the
carrier frequency, minimum pulse width and pulse delay time
may be defined during initialisation of the device. The pulse
delay time (underlap) controls the delay between turning on
and off the two power switches in the inverter, in order to
accommodate variations in the turn-on and turn-off times of
families of power devices.
The MA838 is easily controlled by a microprocessor and
its fully digital generation of PWM waveforms gives
unprecedented accuracy and temperature stability. Precision
pulse shaping capability allows optimum efficiency with any
power circuitry. The device operates as a stand-alone
microprocessor peripheral reading the power waveform directly
from an internal ROM and requiring microprocessor intervention
only when operating parameters need to be changed.
An 8-bit multiplexed data bus is used to receive addresses
and data from the microprocessor/controller. This is a standard
MOTELTM bus, compatible with most microprocessors/
controllers.
FEATURES
s
Fully Digital Operation
s
Interfaces with most Microprocessors
s
Wide Power-Frequency Range
s
12-Bit Frequency Control accuracy
s
Carrier Frequency Selectable up to 24kHz
s
Waveform Stored in Internal ROM
s
Double Edged Regular Sampling
s
Selectable Minimum Pulse Width and Underlap Time
s
DC Injection Braking
MOTEL is a registered trademark of Motorola corp. and Intel corp.
Fig.1 Pin connections (top view)
DP28
MP28/W
NOTE
* = Intel bus format
= Motorola bus format
The power frequency is defined to 12 bits for high accuracy
and a zero setting is included in order to implement DC-injection
braking with no software overhead.
This family is functionally identical to the MA828 PWM
generator IC except that only one PWM channel is provided.
ORDERING INFORMATION
MA838-1 PLABA
(Commercial, Plastic DIL)
MA838-2 PLABA (Commercial, Plastic DIL)
MA838-1 PLABD (Industrial, Plastic DIL)
MA838-2 PLABD (Industrial, Plastic DIL)
MA838-1 SLABA (Commercial, Plastic Small Outline)
MA838-2 SLABA (Commercial, Plastic Small Outline)
MA838-1 SLABD (Industrial, Plastic Small Outline)
MA838-2 SLABD (Industrial, Plastic Small Outline)
The MA838-1 and MA838-2 are the two standard waveform
options offered; refer to PRODUCT DESIGNATION section for
waveform specifications.
2
MA838
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
DD
10V
Voltage on any pin
V
SS
-0.3V to V
DD
+0.3V
Current through any I/O pin
10mA
Storage temperature (see note)
-65C to +125C
Operating temperature range (commercial)
0C to +70C
Operating temperature range (industrial)
-40C to +85C
NOTE: These temperature ranges apply to all package types.
Many package types are available and extended temperature
ranges can be offered for some packages. Further information
is available on request.
1
6
MA838-2
Pure sinewave:
x(t) = A [sin ( t)]
Additional wave shapes can be implemented to order, provided
they are symmetrical about the 90, 180 and 270 axes.
Contact your local GEC Plessey Semiconductors Customer
Service Centre for further details.
PRODUCT DESIGNATION
Two standard options exist, defining waveform shape.
These are designated MA838-1 and MA838-2 as follows:
MA838-1
Sine + third harmonic at one sixth the amplitude of the
fundamental:
x(t) = A [sin ( t) + sin 3( t)]
DC ELECTRICAL CHARACTERISTICS
Test conditions (unless otherwise stated):
V
DD
= 5V5%, T
amb
= 25C
Characteristic
Symbol
Min.
Typ.
Max.
Units
Conditions
Input high voltage
V
IH
2.0
-
-
V
Input low voltage
V
IL
-
-
0.8
V
Input leakage current
I
IN
-
-
10
A
V
IN
= V
SS
or V
DD
Output high voltage
V
OH
4.0
>4.5
-
V
I
OH
= -4mA
Output low voltage
V
OL
-
<0.2
0.4
V
I
OH
= 4mA
Supply current (static)
I
DD (static)
-
-
100
A
all outputs open circuit
(dynamic)
I
DD (dynamic)
-
<10
20
mA
CLK = 10MHz
Supply voltage
V
DD
2.7
5.0
5.5
V
AC ELECTRICAL CHARACTERISTICS
Test conditions (unless otherwise stated):
V
DD
= 5V5%, T
amb
= 25C
Characteristic
Symbol
Min.
Typ.
Max.
Units
Conditions
Clock frequency
f
CLK
-
-
12.5
MHz
M:S ratio 1:1 20%
SET TRIP = 0
Outputs tripped
t
TRIP
-
2/f
CLK
3/f
CLK
s
TRIP
= 0
-
2/f
CLK
3/f
CLK
s
Stresses above those listed in the Absolute Maximum
Ratings may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at
these conditions, or at any other condition above those indicated
in the operations section of this specification, is not implied.
Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability.
3
MA838
PIN DESCRIPTIONS
Pin No.
Name
Type
Function
1
AD
2
I
Multiplexed Address/Data
2
AD
3
I
Multiplexed Address/Data
3
AD
4
I
Multiplexed Address/Data
4
AD
5
I
Multiplexed Address/Data
5
AD
6
I
Multiplexed Address/Data
6
AD
7
I
Multiplexed Address/Data (MSB)
7
RST
I
Resets Internal Counters
8
CLK
I
Clock Input
9
TRIP
O
Output Trip Status
10
CS
I
Chip Select
11
PWMB
O
Bottom PWM Signal
Pin No.
Name
Type
Function
12
V
SS
S
Negative Power Supply
13
PWMT
O
Top PWM Signal
14
SET TRIP
I
Set Output Trip
15
Intel
ALE
I
Intel
Address Latch Enable
Motorola AS
Motorola Address Strobe
16
Intel
RD
I
Intel
Read Strobe
Motorola DS
Motorola Data Strobe
17
Intel
WR
I
Intel
Write Strobe
Motorola
R/W
Motorola Read/Write Select
18
V
DD
S
Positive Power Supply
19
AD
0
I
Multiplexed Address/Data(LSB)
20
AD
1
I
Multiplexed Address/Data
Fig.2 MA838 internal block diagram
4
MA838
FUNCTIONAL DESCRIPTION
An asynchronous method of PWM generation is used with
uniform or `double-edged' regular sampling of the waveform
stored in the internal ROM as illustrated in Fig. 3. Two standard
waveshape options exist so that the device can be adapted to
particular applications (see PRODUCT DESIGNATION section
for details). In addition, any symmetrical waveshape may be
integrated on-chip, to order.
The triangle carrier wave frequency is selectable up to
24kHz (assuming the maximum clock frequency of 12.5MHz is
used), enabling ultrasonic operation for noise critical
applications. With 12.5MHz clock, power frequency ranges of
up to 4kHz are possible, with the actual output frequency
resolved to 12-bit accuracy within the chosen range in order to
give precise motor speed control and smooth frequency
changing.
PWM output pulses can be `tailored' to the inverter
characteristics by defining the minimum allowable pulse width
(deletes all shorter pulses from the `pure' PWM pulse train) and
the pulse delay (underlap) time without the need for external
circuitry. This gives cost advantages in both component savings
and in allowing the same PWM circuitry to be used for control
of a number of different systems simply by changing the
microprocessor software.
Power frequency amplitude control is also provided with an
overmodulation option to assist in rapid motor braking.
Alternatively, braking may be implemented by setting the
frequency to 0Hz. This is termed `DC injection braking', in
which the rotation of the motor is opposed by allowing DC to
flow in the windings.
A trip input allows the PWM outputs to be shut down
immediately, overriding the microprocessor control in the event
of an emergency.
Other possible MA838 applications are as a waveform
generator as part of a switched-mode power supply (SMPS)
or an uninterruptible power supply (UPS). In such applications
the high carrier frequency allows a very small transformer to
be used.
Fig.3 Asynchronous PWM generation with uniform or 'double-edged' regular sampling as used on the MA838
MICROPROCESSOR INTERFACE
The MA838 interfaces to the controlling microprocessor by
means of a multiplexed bus of the MOTEL format. This interface
bus has the ability to adapt itself automatically to the format and
timing of both MOTorola and IntEL interface buses (hence
MOTEL). Internally, the detection circuitry latches the status of
the DS/
RD
line when AS/ALE goes high. If the result is high
then the Intel mode is used; if the result is low then the Motorola
mode is used. This procedure is carried out each time that AS/
ALE goes high. In practice this mode selection is transparent
to the user. For bus connection and timing information refer to
the description relevant to the microprocessor/controller being
used.
Industry standard microprocessors such as the 8085, 8088,
etc. and microcontrollers such as the 8051, 8052 and 6805 are
all compatible with the interface on the MA838. This interface
consists of 8 data lines, AD
0
- AD
7
(write-only in this instance),
which are multiplexed to carry both the address and data
information, 3 bus control lines, labelled
WR
,
RD
and ALE in
Intel mode and
R/W
, DS and AS in Motorola mode, and a Chip
Select input
CS
, which allows the MA838 to share the same
bus as other microprocessor peripherals. It should be noted
that all bus timings are derived from the microprocessor and
are independent of the MA838 clock input.
Intel Mode (Fig. 4 and Table 1)
The address is latched by the falling edge of ALE. Data is
written from the bus into the MA838 on the rising edge of
WR
.
RD
is not used in this mode because the registers in the MA838
are write only. However, this pin must be connected to
RD
(or
tied high) to enable the MA838 to select the correct interface
format.
Motorola Mode (Fig. 5 and Table 2)
The address is latched on the falling edge of the AS line.
Data is written from the bus into the MA838 (only when R/
W
is
low) on the falling edge of DS (providing
CS
is low).
PWM
SWITCHING
INSTANTS
SAMPLING
POINTS
TRIANGLE WAVE AT
CARRIER FREQUENCY
POWER
WAVEFORM AS
READ FROM
INTERNAL
ROM
RESULTING
PWM
WAVEFORM
+1
0
-1
+1
0
-1
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