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Datasheet: CFA33 (White Electronic Designs Corporation)

Density = 16MB-512MB ; Memory Device = Sandisk Flash ; Organization = X16/x8 ; Speed (ns) = 250 ; Volt = 3/5 ;

 

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White Electronic Designs Corporation

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CFA33
SERIES CARDS
Page 1 of 14
WHITE ELECTRONIC DESIGNS, CORP
10/26/01
rev 1
TECHNICAL SPECIFICATIONS
CFA33 Series
Compact Flash (CF) CARDS
8MB to 512MB (in the future: 1024MB)
1
PRODUCT DESCRIPTION
CFA33 series Compact Flash (CF) cards are built with NAND flash memory components operating as solid-state
disk. It complies with the CFA standard and is suitable for use as a data storage memory medium for PCs or other
electronic equipment. The read/write unit is 1 sector (512 bytes) sequential access.
Features
Compact Flash compatible host interface
50 pin two piece connector and stainless steel housing
Automatic sensing of CF and IDE mode
Included 256-byte CIS ROM
Host Interface bus width: 8/16-bit Access
Support 3 power save mode: standby / idle / active
Auto power down function
2-bit ECC function
Operating Voltage: 3.3 V to 5.0 V
High speed data transfer rate:
burst transfer
16MB/sec
sustain write
1000kB/s
Card densities: 32MB to 512MB (in future 1024MB)
3 variations of mode access
Memory card mode
I/O card mode
True-IDE mode
Internal self-diagnostic program operates at V
CC
power on
High data reliability
Endurance: 1,000,000 Program / Erase cycles
High reliability based on internal ECC (Error Correcting Code) function
2-bit ECC
Data reliability is 1 error in 10
14
bits read.
CFA33
SERIES CARDS
Page 2 of 14
WHITE ELECTRONIC DESIGNS, CORP
10/26/01
rev 1
FEATURES
Controller:
o
Self diagnostic
o
Power management:
o
Error Correcting Code (ECC)
Host Interface
o
CFA compatible
o
Support for 8/16-bit data transfers
Power Consumption ( @ 3.3 V )
o
Active Mode:
!
READ: 21-30mA (3.3V), 34-60mA (5V)
!
WRITE: 21-40mA (3.3V), 34-75mA (5V)
o
Idle Mode: 6mA
o
Standby Mode: 200uA @3.3V and 500uA@5V
PC Card-ATA/IDE Interface
o
Support memory and I/O addressing mode
o
Support True IDE mode
o
2-bit ECC
Operating Voltage Range
o
3.3V to 5.0 V
Package Type
o
Compact Flash; type I
Environmental Specifications
Temperature
Operating Commercial
0 - 60 C
Operating Industrial
-40 - 85 C
Non-Operating Commercial
-25 - 85 C
Non-Operating Industrial
-50 - 100 C
Humidity
Operating
8 - 95%, non-condensing
Non-Operating
8 - 95%, non-condensing
Acoustic Noise (at 1 meter)
0 dB
Vibration
Operating
15 G peak to peak max
Non-Operating
15 G peak to peak max
Shock
Operating
2,000
G
max
Non-Operating
2,000
G
max
Reliability and Maintenance
MTBF
>1,000,000
hours
Data Reliability
< 1 non-recoverable error in 10
14
bits read.
CFA33
SERIES CARDS
Page 3 of 14
WHITE ELECTRONIC DESIGNS, CORP
10/26/01
rev 1
2
CARD PIN INFORMATION
Compact Flash card Pin Assignment
Memory card mode
I/O card mode
True IDE mode
Pin NO.
Signal name
I/O
Signal name
I/O
Signal name
I/O
1 GND --
GND --
GND --
2 D3 I/O
D3 I/O
D3 I/O
3 D4 I/O
D4 I/O
D4 I/O
4 D5 I/O
D5 I/O
D5 I/O
5 D6 I/O
D6 I/O
D6 I/O
6 D7 I/O
D7 I/O
D7 I/O
7 -CE1 I
-CE1 I
-CE1 I
8 A10 I
A10 I
A10 I
9 -OE I
-OE I
-ATASEL
I
10
A9 I
A9 I
A9 I
11
A8 I
A8 I
A8 I
12
A7 I
A7 I
A7 I
13 VCC --
VCC --
VCC --
14
A6 I
A6 I
A6 I
15
A5 I
A5 I
A5 I
16
A4 I
A4 I
A4 I
17
A3 I
A3 I
A3 I
18
A2 I
A2 I
A2 I
19
A1 I
A1 I
A1 I
20
A0 I
A0 I
A0 I
21
D0 I/O
D0 I/O
D0 I/O
22
D1 I/O
D1 I/O
D1 I/O
23
D2 I/O
D2 I/O
D2 I/O
24
WP
O -IOIS16 O -IOIS16 O
25 -CD2 O
-CD2 O
-CD2 O
CFA33
SERIES CARDS
Page 4 of 14
WHITE ELECTRONIC DESIGNS, CORP
10/26/01
rev 1
Memory card mode
I/O card mode
True IDE mode
Pin NO.
Signal name
I/O
Signal name
I/O
Signal name
I/O
26 -CD1 O
-CD1 O
-CD1 O
27 D11 I/O
D11 I/O
D11 I/O
28 D12 I/O
D12 I/O
D12 I/O
29 D13 I/O
D13 I/O
D13 I/O
30 D14 I/O
D14 I/O
D14 I/O
31 D15 I/O
D15 I/O
D15 I/O
32 -CE2 I
-CE2 I
-CE2 I
33 -VS1 O
-VS1 O
-VS1 O
34 -IORD I -IORD I -IORD I
35 -IOWR I -IOWR I -IOWR I
36 -WE I
-WE I
-WE I
37 R/Busy
O
-IREQ O
INTRQ
O
38 VCC --
VCC --
VCC --
39 -CSEL I -CSEL I -CSEL I
40 -VS2 O
-VS2 O
-VS2 O
41 RESET I RESET I -RESET I
42 -WAIT O
-WAIT O
IORDY O
43
-INPACK O -INPACK O -INPACK O
44 -REG I
-REG I
-REG I
45
BVD2
I/O -SPKR I/O -DASP I/O
46
BVD1
I/O -STSCHG I/O -PDIAG I/O
47
D8 I/O
D8 I/O
D8 I/O
48
D9 I/O
D9 I/O
D9 I/O
49 D10 I/O
D10 I/O
D10 I/O
50 GND --
GND --
GND --
CFA33
SERIES CARDS
Page 5 of 14
WHITE ELECTRONIC DESIGNS, CORP
10/26/01
rev 1
Card Pin Explanation
Address bus (A0 to A10: input): These address lines along with the REG signal are used to select the
following: The I/O port address registers within the PC Storage Card, the memory mapped port address registers
within the PC Storage Card, a byte in the Card's information structure and its configuration control and status
registers. This signal is the same as the PC Card Memory Mode signal in PC Card I/O mode. In True IDE Mode
only A[2:0] are used to select the one of eight registers in the Task File, the remaining address lines should be
grounded by the host.
Data bus (D0 to D15: input/output): These signal lines carry the Data, Commands and Status information
between the host and the controller. D0 is the LSB of the even byte of the word. D8 is the LSB of the odd byte of
the word. This signal is the same as the PC Card memory mode signal in PC Card I/O mode. In True IDE mode,
all Task File operations occur in byte mode on the low order bus D00-D07 while all data transfers are 16 bit using
D0D15.
Card enable (-CE1, -CE2: input):
-CE1 and -CE2 are card select signals, active low. These input signals
are used both to select the card and to indicate to the card whether a byte or a word operation is being performed.
-CE2 always accesses the odd byte of the word. -CE1 accesses the even byte or the Odd byte of the word
depending on A0 and -CE2. A multiplexing scheme based on A0, -CE1, -CE2 allows 8 bit hosts to access all data
on D00-D07. See tables 3-7,3-8,4-3 and 4-4. This signal is the same as the PC card memory mode signal in PC
Card I/O mode. In the True IDE mode, CE1 is the chip select for the task file registers while CE2 is used to select
the Alternate Status Register and the Device Control Register.
Output enable, ATA select (-OE, -ASTEL: input): -OE is used for the control of data read in Attribute area or
Common memory area. To enable True IDE Mode this input should be grounded by the host (in power up).
Write enable (-WE: input): -WE is used for the control of data write in Attribute memory area or Common
memory area. This is a signal driven by the host and used for strobing memory write data to the registers of the PC
Card when the card is configured in the memory interface mode. It is also used for writing the configuration
registers. In PC Card I/O mode, this signal is used for writing the configuration registers. In True IDE mode, this
input signal is not used and should be connected to VCC by the host.
I/O read (-IORD: input): -IORD is used for control of read data in the Task File area. This card does not respond
to -IORD until I/O card interface setting up.
I/O write (-IOWR: input): -IOWR is used for control of data write in the Task File area. This card does not
respond to -IOWR until I/O card interface setting up. This signal is not used in memory mode. The I/O write strobe
pulse is used to clock I/O data on the card data bus into the PC Card controller registers when the PC Card is
configured to use the I/O interface. The clocking will occur on the negative to positive edge of the signal (trailing
edge). In True IDE mode, this signal has the same function as in PC Card I/O Mode.
Ready/Busy, Interrupt request (RDY/-BSY, -IREQ, INTRQ: output): In memory mode, this signal is set high
when the PC Card is ready to accept a new data transfer operation and held low when the card is busy. The host
memory card socket must provide a pull-up resistor. At power up and at reset, the RDY/-BSY signal is held low
(busy) until the PC Card has completed its power up or reset function. No access of any type should be made to
the PC Card during this time. The RDY/-BSY signal is held high (disabled from being busy) whenever the following
condition is true: The PC Card has been powered up with RESET continuously disconnected or asserted. I/O
operation - After the PC Card has been configured for I/O operation, this signal is used as Interrupt request. This
line is strobed low to generate a pulse mode interrupt or held low for a level mode interrupt. In True IDE mode, this
signal is the active high Interrupt request to the host.
Card detection (-CD1, -CD2: output): -CD1 and -CD2 are the card detection signals. -CD1 and -CD2 are
connected to ground in this card, so the host can detect if the card is inserted or not.
Write protect, 16 bit I/O port (WP, -IOIS16: output): In memory card mode, WP is held low because this card
does not have a write protect switch. In the I/O card mode, -IOIS16 is asserted when Task File registers are
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