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Datasheet: T277-S14 (TLSI Incorporated)

Vcxo Clock Generator

 

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GENERAL DESCRIPTION
TLSI's family of VCXO Clock Generators is ideally
suited for a wide range of applications in which cost,
size, power, and the number of discrete components
need to be minimized. These ICs are designed to
exhibit excellent temperature stability and phase
noise performance. The device incorporates a
programmable divider that allows the user to select
output frequencies lower than the crystal frequency
while providing 50% output symmetry. Typical
tuning frequency range is
200 PPM (crystal and
varactor dependent). The devices are available as die,
probed wafers, or in surface-mount packages.
FEATURES
Crystal Frequency Range 8 MHz to 100 MHz
Supply Voltage 3 V to 5.5 V
Operating Temperature -40C to +85C
Power less than 150 mW
Start-Up Time less than 5 mS
Phase Noise at 100 KHz Offset from Fc
less than -140 dBc/Hz
Rise and Fall Times less than 3 nS
Programmable Frequency Division: 1, 4,16
Nominal Output Duty Cycle 45% to 55%
Output Drive Capability of 50 pF
Tuning Input Impedance 50 K
Internal Crystal Load Capacitance 20 pF
T 27 7
V C X O C l o c k G e n e r a t o r I C
8 M H z t o 1 0 0 M H z
P
R
E
L
I
M
I
N
A
R
Y
BLOCK DIAGRAM
VDD
VSS
T277 VCXO Clock Generator IC Block Diagram
VCTRL
VARACTOR
XTAL
XTL2
XTL1
DIV
OE
FOUT
OUTPUT DRIVER
OSCILLATOR
POWER ON
RESET
BIAS
AMPLITUDE
CONTROL
PROGRAMMABLE
DIVIDER
PARAMETER CONDITIONS
UNITS
Supply Voltage
V
SS
- 0.5
V
DD
6.0 V
DC Input Voltage
V
SS
- 0.5
V
IN
V
DD
+ 0.5
V
DC Output Voltage
V
SS
- 0.5
V
OUT
V
DD
+ 0.5
V
Storage Temperature
-65 < T
S
< +150
C
Ambient Temperature -40 < T
A
< +85
C
Junction Temperature
-65 < T
J
< +125
C
Soldering Temperature
T
SLDR
< 260 for less than 10 seconds
C
ABSOLUTE MAXIMUM RATINGS*
* Operation of the device at or beyond these specifications may result in permanent damage or
affect operation and reliability of the product.
PARAMETER CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
Supply Voltage
V
DD
3.0 5.0 5.5 V
High-Level Output Voltage
I
O H
= -1mA
V
OH
4.5 V
Low-Level Output Voltage
I
O L
= 20 mA
V
OL
0.5 V
High-Level Input Voltage
V
I H
1.0
Low-Level Input Voltage
V
I L
4.0 V
OE High-Level Input Current
I
I H
1.0
A
OE Low-Level Input Current
I
O L
-50
A
DIV High-Level Input Current
DIV = V
DD
I
I H
50
A
DIV Low-Level Input Current
DIV = V
SS
I
O L
-50
A
Supply Current
F=20 MHz,C
L
=50 pf,
I
DD
8.5
13.0 mA
DIV = OPEN
Tuning Range
(See Tuning Range Section)
f
200
ppm
Crystal Drive
V
XTL
1.0 V
pp
High-Level Output Source Current
V
OH
= 4.0 V
I
OH
-60 mA
Low-Level Output Sink Current
V
OL
= 1.0 V
I
OL
60 mA
Short-Circuit Source Current
< 60 seconds
I
OSH
-40
mA
Short-Circuit Sink Current
< 60 seconds
I
OS L
40
mA
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS
V
DD
= 5.0 V, -40 C < T
A
< +85 C unless otherwise specified
2
AC CHARACTERISTICS
V
DD
= 5.0 V, -40 C < T
A
< +85 C unless otherwise specified
PARAMETER CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
Crystal Frequency Range
F
XTL
8.0 100.0
MHz
Output Duty Cycle
ODC
45 55
%
Power-Up Interval
T
ON
2.5
5.0
ms
Output Jitter
RMS, 12kHz to 10MHz
J
O
1
ps
Rise and Fall Time
C
L
=25 pF
t
r
,t
f
3
ns
Phase Noise
100 kHz offset from F
c
N
PH
-140 dBc/Hz
Temperature Stability
F
TEMP
15 ppm
Frequency vs. Load Capacitance
F
LC
1
ppm
Frequency vs. Supply Voltage
V
DD
15%
F
SV
1
ppm
Tuning Input Impedance
Z
TUNE
50 100
K
3
TUNING RANGE
Tuning Range depends on the design of the crystal and the capacitance loading of the printed
circuit board and the variable capacitance loading the T277 IC. The parallel resonant frequency of
the crystal with any external capacitive loading is greater than the fixed series resonant frequency of
the crystal by
f:
f = Cx10
6
/2(C
O
+C
P
) ppm
where C is the series mechanical capacitance of the crystal, C
O
is the parallel capacitance of the
filter, and C
P
is the additional loading capacitance used to tune the crystal. The loading capacitance
is the equivalent capacitance of the 20 pF chip internal load capacitance in series with the varactor
capacitance. All capacitances are in units of picofarads.
Example:
For a typical crystal, C = 0.02 pf and C
O
= 5 pf. Using a Hyperabrupt Tuning Diode, the
typical capacitance of the diode is 12.3 pF at 1 volt and 2.60 pf at 3 volts. The varactor diode
appears in series with the 20 pF internal chip capacitance. In addition, assuming 2 pF stray board
wiring capacitance across both the varactor and the chip terminals, the following calculations
determine the pullability of the oscillator:
Frequency shift with 1 volt across the varactor diode:
C
P
= 20 pF + 2 pF in series with 12.3 pF + 2 pF = (22.0x14.3)/(22.0+14.3) pF = 8.67 pF
f
1
= 0.02x10
6
/(2(5+8.67) ppm = 731.5 ppm
Frequency shift with 3 volts across the varactor diode:
C
P
= 20 pF + 2 pF in series with 2.60 pF + 2 pF = (22.0x4.60)/(22.0+4.60) pF = 3.80 pF
f
2
= 0.02x10
6
/(2(5+3.80) ppm = 1136.4 ppm
Total Tuning Range =
f
2
f
1
= 1136.4 ppm - 731.5 ppm = 405 ppm
L
C
C0
P
C
Oscillator Equivalent Circuit
R
OUTPUT WAVEFORMS
6
7
V
olts
Nanoseconds
OUTPUT WAVEFORM, 50 MHz, with 20 pF and 50 pF loads
5
4
3
2
1
0
-1
0
5
10
15
20
25
30
35
40
45
50
20 pF Output Load
Vo
l
t
s
50 pF Output Load
Nanoseconds
4
GRAPHS OF TYPICAL OPERATING CONDITIONS
DIVIDER MODES
Undivided Crystal Frequency = F
XTL
DIV FOUT
OPEN F
XTL
V
SS
F
XTL
/4
V
DD
F
XTL
/16
4.5
10
10
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
100
1000
10000
100000
20
30
40
50
60
70
80
100
90
-1
0
5
10
15
20
25
-0.5
0
0.5
1
4.75
VDD, volts
Frequency, MHz
Frequency Offset from fo, Hz
Fr
equency Shift, ppm
Supply Curr
ent, mA
Phase Noise, dBc/Hz
5
5.25
5.5
VTCRL = 5.0V
VTCRL = 2.5V
VTCRL = 0.5V
Output Load = 20 pF
Output Load = 10 pF
Output Load = 0 pF
Frequency Shift vs. VDD, T = 25C
Supply Current vs. Frequency
Phase Noise vs. Frequency Offset
fo = 0.5 MHz
fo = 70 MHz
5
TEST CIRCUIT SCHEMATIC
VSUPPLY
CBYPASS
VCTRL
XTAL
1
2
3
4
5
10
9
8
7
6
XTL2
VCTRL
OE
AVSS
DIV
XTL1
DIV
VDD
OUT
VSS
T277
T277 TEST CIRCUIT 10-Pin MSOP Configuration
V
V
VSUPPLY
5V
VSUPPLY
5V
CBYPASS
CBYPASS
VCTRL
VCTRL
VARACTOR
XTAL
XTAL
1
2
3
4
5
6
7
1
2
3
4
8
7
6
5
XTL2
NC
VCTRL
OE
VSS
DIV
VSS
XTL2
VCTRL
OE
VSS
XTL1
DIV
VDD
FOUT
XTL1
NC
NC
NC
VDD
NC
FOUT
14
13
12
11
10
9
8
T277
T277
25 pF
25 pF
T277 TEST CIRCUIT 14-Pin SOIC Configuration
T277 TEST CIRCUIT 8-Pin SOIC Configuration
V
V
V
V
VARACTOR
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