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Datasheet: 31402BFA (Texas Instruments)

DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT TRIGGER INPUTS

 

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Texas Instruments
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SDLS213B - DECEMBER 1983 - REVISED NOVEMBER 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Dual Versions of Highly Stable SN54121
and SN74121 One Shots
D
SN54221 and SN74221 Demonstrate
Electrical and Switching Characteristics
That Are Virtually Identical to the SN54121
and SN74121 One Shots
D
Pinout Is Identical to the SN54123,
SN74123, SN54LS123, and SN74LS123
D
Overriding Clear Terminates Output Pulse
TYPE
MAXIMUM
OUTPUT
PULSE
LENGTH(S)
SN54221
21
SN74221
28
SN54LS221
49
SN74LS221
70
description/ordering information
The '221 and 'LS221 devices are dual
multivibrators with performance characteristics
virtually identical to those of the '121 devices.
Each multivibrator features a negative-transition-
triggered input and a positive-transition-triggered
input, either of which can be used as an inhibit
input.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP - N
Tube
SN74221N
SN74221N
PDIP - N
Tube
SN74LS221N
SN74LS221N
0
C to 70
C
SOIC - D
Tube
SN74LS221D
LS221
0
C to 70
C
SOIC - D
Tape and reel
SN74LS221DR
LS221
SOP - NS
Tape and reel
SN74LS221NSR
74LS221
SSOP - DB
Tape and reel
SN74LS221DBR
LS221
CDIP - J
Tube
SNJ54221J
SNJ54221J
-55
C to 125
C
CDIP - J
Tube
SNJ54LS221J
SNJ54LS221J
-55 C to 125 C
LCCC - FK
Tube
SNJ54LS221FK
SNJ54LS221FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
1C
ext
1Q
NC
2Q
2CLR
1CLR
1Q
NC
2Q
2C
ext
1B
1A
NC
2A
2B
V
1R
ext
GND
NC
1A
1B
1CLR
1Q
2Q
2C
ext
2R
ext
/C
ext
GND
V
CC
1R
ext
/C
ext
1C
ext
1Q
2Q
2CLR
2B
2A
SN54221, SN54LS221 . . . J PACKAGE
SN74221 . . . N PACKAGE
SN74LS221 . . . D, DB, N, OR NS PACKAGE
(TOP VIEW)
SN54LS221 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC
ext
/C
ext
2R
/C
ext
NC - No internal connection
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SDLS213B - DECEMBER 1983 - REVISED NOVEMBER 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input
pulse. Schmitt-trigger input circuitry (TTL hysteresis) for B input allows jitter-free triggering from inputs with
transition at rates as slow as 1 V/s, providing the circuit with excellent noise immunity, typically of 1.2 V. A high
immunity to V
CC
noise, typically of 1.5 V, also is provided by internal latching circuitry.
Once fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing
components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any duration
relative to the output pulse. Output pulse length can be varied from 35 ns to the maximum by choosing
appropriate timing components. With R
ext
= 2 k
and C
ext
= 0, an output pulse typically of 30 ns is achieved
that can be used as a dc-triggered reset signal. Output rise and fall times are TTL compatible and independent
of pulse length. Typical triggering and clearing sequences are shown as a part of the switching characteristics
waveforms.
Pulse-width stability is achieved through internal compensation and is virtually independent of V
CC
and
temperature. In most applications, pulse stability is limited only by the accuracy of external timing components.
Jitter-free operation is maintained over the full temperature and V
CC
ranges for more than six decades of timing
capacitance (10 pF to 10
F) and more than one decade of timing resistance (2 k
to 30 k
for the SN54221,
2 k
to 40 k
for the SN74221, 2 k
to 70 k
for the SN54LS221, and 2 k
to 100 k
for the SN74LS221).
Throughout these ranges, pulse width is defined by the relationship: t
w
(out) = C
ext
R
ext
In2
0.7 C
ext
R
ext
. In
circuits where pulse cutoff is not critical, timing capacitance up to 1000
F and timing resistance as low as 1.4 k
can be used. Also, the range of jitter-free output pulse widths is extended if V
CC
is held to 5 V and free-air
temperature is 25
C. Duty cycles as high as 90% are achieved when using maximum recommended R
T
. Higher
duty cycles are available if a certain amount of pulse-width jitter is allowed.
The variance in output pulse width from device to device typically is less than
0.5% for given external timing
components. An example of this distribution for the '221 is shown in Figure 3. Variations in output pulse width
versus supply voltage and temperature for the '221 are shown in Figures 4 and 5, respectively.
Pin assignments for these devices are identical to those of the SN54123/SN74123 or SN54LS123/SN74LS123
so that the '221 or 'LS221 devices can be substituted for those products in systems not using the retrigger by
merely changing the value of R
ext
and/or C
ext
; however, the polarity of the capacitor must be changed.
FUNCTION TABLE
(each monostable multivibrator)
INPUTS
OUTPUTS
CLR
A
B
Q
Q
L
X
X
L
H
X
H
X
L
H
X
X
L
L
H
H
L
H
H
L
H
Pulsed-output patterns are tested during
AC switching at 25
C with Rext = 2 k
, and
Cext = 80 pF.
This condition is true only if the output of
the latch formed by the two NAND gates
has been conditioned to the logic 1 state
prior to CLR going high. This latch is
conditioned by taking either A high or
B low while CLR is inactive (high).
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SDLS213B - DECEMBER 1983 - REVISED NOVEMBER 2004
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing component connections
VCC
Rext
To Cext
Terminal
To Rext/Cext
Terminal
NOTE: Due to the internal circuit, the Rext/Cext terminal never is more positive than the Cext terminal.
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SDLS213B - DECEMBER 1983 - REVISED NOVEMBER 2004
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
schematics of inputs and outputs
VCC
Req
Input
VCC
100
NOM
Output
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
SN54/74221
SN54/74LS221
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
VCC
Req
Input
VCC
Output
120
NOM
A Input: Req = 4 k
NOM
B, CLR Input: Req = 2 k
NOM
A Input: Req = 25 k
NOM
B Input: Req = 15.4 k
NOM
CLR: Req = 12.5 k
NOM
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SDLS213B - DECEMBER 1983 - REVISED NOVEMBER 2004
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1): 'LS221
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
'221 5.5
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): D package
73
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package
82
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
64
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54221
SN74221
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.75
5
5.25
V
IOH
High-level output current
-800
-800
A
IOL
Low-level output current
16
16
mA
v/
t
Rise or fall of input pulse rate
B input
1*
1
V/s
v/
t
Rise or fall of input pulse rate
A input
1*
1
V/
s
TA
Operating free-air temperature
-55
125
0
70
C
On products compliant to MIL-PRF-38535, this parameter is not production tested.
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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