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Datasheet: 26LS32 (Texas Instruments)

Quadruple Differential Line Receivers

 

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Texas Instruments
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCTOBER 1980 REVISED MARCH 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
AM26LS32A Devices Meet or Exceed the
Requirements of ANSI TIA/EIA-422-B,
TIA/EIA-423-B, and ITU Recommendations
V.10 and V.11
D
AM26LS32A Devices Have
7-V
Common-Mode Range With
200-mV
Sensitivity
D
AM26LS33A Devices Have
15-V
Common-Mode Range With
500-mV
Sensitivity
D
Input Hysteresis . . . 50 mV Typical
D
Operate From a Single 5-V Supply
D
Low-Power Schottky Circuitry
D
3-State Outputs
D
Complementary Output-Enable Inputs
D
Input Impedance . . . 12 k
Min
D
Designed to Be Interchangeable With
Advanced Micro Devices AM26LS32
and
AM26LS33
description
The AM26LS32A and AM26LS33A devices are
quadruple differential line receivers for balanced
and unbalanced digital data transmission. The
enable function is common to all four receivers
and offers a choice of active-high or active-low
input. The 3-state outputs permit connection
directly to a bus-organized system. Fail-safe
design ensures that, if the inputs are open, the
outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional
stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading
of the bus line. The additional stage has increased propagation delay; however, this does not affect
interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0
C to 70
C. The AM26LS32AI is
characterized for operation from 40
C to 85
C. The AM26LS32AM and AM26LS33AM are characterized for
operation over the full military temperature range of 55
C to 125
C.
Copyright
2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
AM26LS32 and AM26LS33 are trademarks of Advanced Micro Devices, Inc.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
V
CC
4B
4A
4Y
G
3Y
3A
3B
AM26LS32AC . . . D, N, OR NS PACKAGE
AM26LS32AI, AM26LS33AC . . . D OR N PACKAGE
AM26LS32AM, AM26LS33AM . . . J PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
4Y
NC
G
3Y
1Y
G
NC
2Y
2A
AM26LS32AM, AM26LS33AM . . . FK PACKAGE
(TOP VIEW)
1A
1B
NC
3B
3A
4B
2B
GND
NC
V
CC
NC No internal connection
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCTOBER 1980 REVISED MARCH 2002
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
ENABLES
OUTPUT
A B
G
G
Y
VID
VIT
H
X
H
VID
VIT+
X
L
H
VIT
VID
VIT
H
X
?
VIT
VID
VIT+
X
L
?
VID
VIT
H
X
L
VID
VIT
X
L
L
X
L
H
Z
Open
H
X
H
Open
X
L
H
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic diagram (positive logic)
4
12
2
1
3
6
7
5
10
9
11
14
15
13
G
G
1A
1B
2A
2B
3A
3B
4A
4B
1Y
2Y
3Y
4Y
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCTOBER 1980 REVISED MARCH 2002
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
schematics of inputs and outputs
EQUIVALENT OF EACH
DIFFERENTIAL INPUT
VCC
Input
EQUIVALENT OF EACH ENABLE INPUT
Output
85
NOM
TYPICAL OF ALL OUTPUTS
8.3 k
NOM
Enable
20 k
NOM
960
NOM
960
NOM
100 k
A Input Only
VCC
100 k
B Input Only
VCC
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
(see Note 1)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
: Any differential input
25 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other inputs
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
ID
(see Note 2)
25 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation
See Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 3): D package
73
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
64
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds, T
C
: FK package
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package
260
C
. . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package
300
C
. . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. All voltage values, except differential voltages, are with respect to the network ground terminal.
2. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
C
TA = 70
C
POWER RATING
TA = 125
C
POWER RATING
FK
1375 mW
11.0 mW/
C
880 mW
275 mW
J
1375 mW
11.0 mW/
C
880 mW
275 mW
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCTOBER 1980 REVISED MARCH 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
VCC
Supply voltage
AM26LS32AC, AM26LS32AI, AM26LS33AC
4.75
5
5.25
V
VCC
Supply voltage
AM26LS32AM, AM26LS33AM
4.5
5
5.5
V
VIH
High-level input voltage
2
V
VIL
Low-level input voltage
0.8
V
VIC
Common mode input voltage
AM26LS32A
7
V
VIC
Common-mode input voltage
AM26LS33A
15
V
IOH
High-level output current
440
A
IOL
Low-level output current
8
mA
AM26LS32AC, AM26LS33AC
0
70
TA
Operating free-air temperature
AM26LS32AI
40
85
C
AM26LS32AM, AM26LS33AM
55
125
electrical characteristics over recommended ranges of V
CC
, V
IC
, and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT
Positive-going
VO = VOHmin IOH = 440
A
AM26LS32A
0.2
V
VIT+
g
g
input threshhold voltage
VO = VOHmin, IOH = 440
A
AM26LS33A
0.5
V
VIT
Negative-going
VO = 0 45 V IOL = 8 mA
AM26LS32A
0.2
V
VIT
g
g
g
input threshhold voltage
VO = 0.45 V, IOL = 8 mA
AM26LS33A
0.5
V
Vhys
Hysteresis voltage
(VIT+ VIT)
50
mV
VIK
Enable-input clamp voltage
VCC = MIN,
II = 18 mA
1.5
V
VOH
High level output voltage
VCC =MIN, VID = 1 V,
AM26LS32AC
AM26LS33AC
2.7
V
VOH
High-level output voltage
CC
,
ID
,
VI(G) = 0.8 V, IOH = 440
A
AM26LS32AM, AM26LS32AI,
AM26LS33AM
2.5
V
VOL
Low level output voltage
VCC = MIN, VID = 1 V,
IOL = 4 mA
0.4
V
VOL
Low-level output voltage
CC
,
ID
,
VI(G) = 0.8 V
IOL = 8 mA
0.45
V
IOZ
Off-state
(high impedance state)
VCC = MAX
VO = 2.4 V
20
A
IOZ
(high-impedance state)
output current
VCC = MAX
VO = 0.4 V
20
A
II
Line input current
VI = 15 V,
Other input at 10 V to 15 V
1.2
mA
II
Line input current
VI = 15 V,
Other input at 15 V to 10 V
1.7
mA
II(EN)
Enable input current
VI = 5.5 V
100
A
IIH
High-level enable current
VI = 2.7 V
20
A
IIL
Low-level enable current
VI = 0.4 V
0.36
mA
rI
Input resistance
VIC = 15 V to 15 V,
One input to ac ground
12
15
k
IOS
Short-circuit output current
VCC = MAX
15
85
mA
ICC
Supply current
VCC = MAX,
All outputs disabled
52
70
mA
All typical values are at VCC = 5 V, TA = 25
C, and VIC = 0.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels
only.
Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCTOBER 1980 REVISED MARCH 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics, V
CC
= 5 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
Propagation delay time, low-to-high-level output
CL = 15 pF
See Figure 1
20
35
ns
tPHL
Propagation delay time, high-to-low-level output
CL = 15 pF,
See Figure 1
22
35
ns
tPZH
Output enable time to high level
CL = 15 pF
See Figure 1
17
22
ns
tPZL
Output enable time to low level
CL = 15 pF,
See Figure 1
20
25
ns
tPHZ
Output disable time from high level
CL = 5 pF
See Figure 1
21
30
ns
tPLZ
Output disable time from low level
CL = 5 pF,
See Figure 1
30
40
ns
PARAMETER MEASUREMENT INFORMATION
S1 Open
S2 Closed
5 k
S1
RL = 2 k
VCC
From Output
Under Test
CL
(see Note A)
See Note B
S2
tPHL
VOH
VOL
2.5 V
2.5 V
tPLH
S1 and S2 Closed
VOLTAGE WAVEFORMS FOR tPLH, tPHL
TEST CIRCUIT
10%
90%
10%
90%
0
3 V
10%
10%
90%
90%
1.3 V
1.3 V
1.3 V
1.3 V
3 V
0
5 ns
10%
90%
10%
90%
0
3 V
10%
10%
90%
90%
1.3 V
1.3 V
1.3 V
1.3 V
3 V
0
Enable G
Enable G
tPZH
1.3 V
Output
VOH
0.5 V
1.4 V
tPHZ
S1 Closed
S2 Closed
tPZL
1.3 V
S1 Closed
S2 Open
S1 Closed
S2 Closed
VOL
0.5 V
tPLZ
VOLTAGE WAVEFORMS FOR tPHZ, tPZH
VOLTAGE WAVEFORMS FOR tPLZ, tPZL
Test
Point
Output
See Note C
See Note C
Input
Output
Enable G
Enable G
5 ns
5 ns
5 ns
1.4 V
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
0
0
1.3 V
1.3 V
Figure 1
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