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Datasheet: adc1280x (Samsung semiconductor)

ADC1280X 0.18µm 10-BIT 30MSPS ADC ; Function = ADC ; Configuration = 10BIT 30MSPS ; Library Type = - ; Characteristic = -

 

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Samsung semiconductor
ADC1280X
0.18
m 10-BIT 30MSPS ADC
1
GENERAL DESCRIPTION
The ADC1280X is a CMOS 10-bit low-voltage and high-speed A/D converter (ADC) for video and other applications. It
has a four-step pipelined architecture, which consists of the sample & hold amplifier, multiplying D/A converters
(DACs), and subranging flash ADCs.
The maximum conversion rate of ADC1280X is 30MSPS and supply voltage is 1.8V single.
FEATURES
-- Resolution : 10-bit
-- Maximum Conversion Rate : 30MSPS
-- Power Supply : 1.8V Single
-- Differential Linearity
Error :
1.0 LSB
-- Integral Linearity Error :
2.0 LSB
-- Sample & Hold Function Implemented
-- Low Power Consumption : 21.6mW(Typ)
-- Operating Temperature Range : -40
C 85
C
TYPICAL APPLICATIONS
-- CCD imaging processors
Camcorders, scanners, and security cameras.
-- Read channel LSI
HDD, DVD, and CD-ROM drives
-- IF and baseband signal digitizers
-- Portable equipments for low-power applications
0.18
m 10-BIT 30MSPS ADC
ADC1280X
2
FUNCTIONAL BLOCK DIAGRAM
CML Level
Generator
STC
STBY
ITEST
REFTOP
REFBOT
MDAC1
AINT
MDAC2
MDAC3
SHA
Flash1
Flash2
Flash3
Flash4
AINC
Digital Correction Logic (DCL)
Clock
Generator
Bias
Current
Generator
SPEEDUP
CKIN
CML
EOC
DO[9:0]
AVDD18A
AVSS18A
AVBB18A
AVDD18D
AVSS18D
AVBB18D
Ver 2.2 (May. 2002)
No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties
that may result from its use. The content of this data sheet is subject to change without any notice.
ADC1280X
0.18
m 10-BIT 30MSPS ADC
3
CORE PIN DESCRIPTION
Name
I/O Type
I/O Pad
Pin Description
AINT
AI
piar50_abb
Analog
Input
+
(
0.5V
~
1.3V)
AINC
AI
piar50_abb
Analog
Input
-
(1.3V ~ 0.5V)
REFTOP
AI
pia_abb
Reference
Top
(1.3V)
REFBOT
AI
pia_abb
Reference
Bottom (0.5V)
AVDD18A
AP
vdd1t_abb
Analog
Power
(1.8V)
AVSS18A
AG
vss1t_abb
Analog
Ground
AVBB18A
AG
vbb1_abb
Analog
Sub
Bias
ITEST
AB
pia_abb
Test pin (normally, open)
STBY
DI
picc_abb
Standby
mode (normally,
gnd)
STC
DI
picc_abb
Start
of
conversion
signal
(normally,
high)
SPEEDUP
DI
picc_abb
Speed
test
pin (normally,
gnd)
CKIN
DI
picc_abb
Sampling
Clock
Input
CML
AB
pia_abb
Test
Pin (normally, open)
DO[9:0]
DO
poa_abb
Digital
Output
EOC
DO
poa_abb
End
of
conversion
signal
AVBB18D
DG
vbb1_abb
Digital
Sub
Bias
AVSS18D
DG
vss1t_abb
Digital
Ground
AVDD18D
DP
vdd1t_abb
Digital
Power
I/O Type Abbr.
-- AI: Analog Input
-- DI: Digital Input
-- AO: Analog Output
-- DO: Digital Output
-- AB: Analog Bi-direction
-- DB: Digital Bi-direction
-- AP: Analog Power
-- AG: Analog Ground
-- DP: Digital Power
-- DG: Digital Ground
0.18
m 10-BIT 30MSPS ADC
ADC1280X
4
CORE CONFIGURATION
adc1280x
CKIN
AINC
EOC
DO[9:0]
AINT
REFTOP
REFBOT
STBY
SPEEDUP
CML
ITEST
STC
AVDD18A
AVSS18A
AVSS18D
AVBB18D
AVBB18A
AVDD18D
ADC1280X
0.18
m 10-BIT 30MSPS ADC
5
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Supply Voltage
V
DD
2.5
V
Analog Input Voltage
AIN
V
SS
to V
DD
V
Digital Input Voltage
CLK
V
SS
to V
DD
V
Digital Output Voltage
V
OH
, V
OL
V
SS
to V
DD
V
Storage Temperature Range
Tstg
-45 to 125
C
NOTES:
1. ABSOLUTE MAXIMUM RATING specifies the values beyond which the device may be damaged permanently. Exposure
to ABSOLUTE MAXIMUM RATING conditions for extended periods may affect reliability. Each condition value is applied
with the other values kept within the following operating conditions and function operation under any of these conditions
is not implied.
2. All voltages are measured with respect to V
SS
unless otherwise specified.
3. 100pF capacitor is discharged through a 1.5K
resistor (Human body model)
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Typ
Max
Unit
Supply Voltage
AVDD18A - AVSS18A
AVDD18D - AVSS18D
1.7
1.8
1.9
V
Supply Voltage Difference
AVDD18A - AVDD18D
-0.1
0.0
0.1
V
Reference Input
Voltage(Externally)
REFTOP
REFBOT
1.3
0.5
V
Analog Input Voltage (+)
AINT
0.5
1.3
V
Analog Input Voltage (-)
AINC
1.3
0.5
V
Operating Temperature
Topr
-40
85
C
NOTE: It is strongly recommended that all the supply pins (AVDD18A, AVDD18D) be powered from the same source to
avoid power latch-up.
0.18
m 10-BIT 30MSPS ADC
ADC1280X
6
DC ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Test Conditions
Resolution
10
Bits
Reference Current
IREF
2
3
mA
Differential Linearity Error
DLE
1.0
LSB
Integral Linearity Error
ILE
2.0
LSB
Bottom Offset Voltage Error
EOB
20
LSB
Top Offset Voltage Error
EOT
20
LSB
NOTES:
1.
Converter
Specifications
(unless
otherwise
specified)
AVDD18A=1.8V
AVDD18D=1.8V
AVSS18A=GND
AVSS18D=GND
Ta=25
C
2.
TBD
:
To
Be
Determined
AC ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Test Conditions
Maximum Conversion Rate
fc
30
MSPS
Dynamic Supply Current
Ivdd
12
mA
fc=30MHz
(without system load)
Digital Output Data Delay
td
2.1
ns
See
"TIMING DIAGRAM"
Signal - to - Noise Ratio
SNR
48
52
dB
AINT = 1MHz
fc = 30MHz
ADC1280X
0.18
m 10-BIT 30MSPS ADC
7
I/O
CHART
Index
AINT Input (V)
AINC Input (V)
Digital Output
0
0.50000 ~ 0.50078
1.29922 ~ 1.30000
0000000000
1LSB=1.5625mV
1
0.50078 ~ 0.50156
1.29844 ~ 1.29922
0000000001
for differential input
2
0.50156 ~ 0.50234
1.29766 ~ 1.29844
0000000010
REFTOP=1.3V
REFBOT=0.5V
511
0.89922 ~ 0.90000
0.90078 ~ 0.90156
0111111111
512
0.90000 ~ 0.90078
0.90000 ~ 0.90078
1000000000
513
0.90078 ~ 0.90156
0.89922 ~ 0.90000
1000000001
1021
1.29766 ~ 1.29844
0.50156 ~ 0.50234
1111111101
1022
1.29844 ~ 1.29922
0.50078 ~ 0.50156
1111111110
1023
1.29922 ~ 1.30000
0.50000 ~ 0.50078
1111111111
0.18
m 10-BIT 30MSPS ADC
ADC1280X
8
TIMING DIAGRAM
1. Main Waveform
Analog
Input
CKIN
DO[9:0]
A1
A2
D1
D2
D4
D6
STC
EOC
Pipeline Delay
td
A6
A4
Output code of DO[9:0] is generated during STC (Start of Conversion) signal is just "HIGH". Otherwise, it keeps the
current state. After STC goes "HIGH", the A/D converter requires the pipeline delay of 3 clock period to generate
EOC signal and DO[9:0].
2. STC & CKIN
CKIN
T
SAFE
8ns
4ns
STC
T
SAFE
8ns
4ns
The STC signal is rising-edge triggered, and it should be changed during "T
SAFE
" region on CKIN.
ADC1280X
0.18
m 10-BIT 30MSPS ADC
9
CORE EVALUATION GUIDE
1. ADC function is evaluated by external check on the bidirectional pads connected to input nodes of HOST DSP
back-end circuit.
2. The reference voltages may be biased internally through resistor divider.
10-bit
Digital
Output
adc1280x
Clock
Input
Analog
Input
EOC
DO[9:0]
AINT
AVDD18A
AVSS18A
AVSS18D
AVBB18D
AVBB18A
AVDD18D
REFTOP
REFBOT
STBY
SPEEDUP
CML
ITEST
STC
AINC
CKIN
GND
GND
GND
GND
STC Input or 1.8V
0.5V Reference Bottom
1.3V Reference Top
GND
1.8V
GND
1.8V
Digital MUX
BIDIRECTIONAL PAD
ADC Function
Measuring
&
Digitla Input
Forcing
Host DSP Core
: 0.1
F Ceramic Capacitor
Unless otherwise specified
: 10
F Ceramic Capacitor
Unless otherwise specified
0.18
m 10-BIT 30MSPS ADC
ADC1280X
10
PACKAGE CONFIGUATION
1 REFTOP
REFTOP
REFBOT
REFBOT
CML
AVDD18A
AVDD18A
AVBB18A
AVSS18A
AVSS18A
AINT
NC
AVS
S18A
NC
SPEEDUP
ITEST
STBY
AVDD18R
AVSS18R
CKIN
NC
NC
NC
NC
AVDD18D
AVDD18D
AVSS18D
AVSS18D
AVBB18D
EOC
NC
NC
NC
DO[9]
DO[8]
DO[7]
DO[6]
DO[5]
DO[4]
DO[3]
DO[2]
DO[1]
DO[0]
NC
10u
STC
0.1u
10u
0.1u
NC
NC
NC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
10u
0.1u
0.1u
0.1u
10u
adc1280x_top
1.8V
10-b ADC
output
STC in
EOC out
0.5V
1.8V
10u
0.1u
50
1K
0.1u
0.1u
50
1.8V
Clock in
: Test Pin
No bias forcing, Remain floating
1.3V
Analog
Input
ADC1280X
0.18
m 10-BIT 30MSPS ADC
11
PACKAGE PIN DESCRIPTION
Pin Name
Pin No.
I/O Type
Pin Description
REFTOP
1,2
AI
External Reference Top Bias (1.3V)
REFBOT
3,4
AI
External Reference Bottom Bias (0.5V)
CML
5
AB
Internal Bias Point (Test Pin)
AVDD18A
6,7
AP
Analog Power (1.8V)
AVBB18A
8
AG
Analog Sub Bias
AVSS18A
9,10
AG
Analog Ground
AINT
11
AI
Analog Input + (Input Range : 0.5 1.3V Differential)
AINC
13
AI
Analog Input. - (Input Range : 1.3 0.5V Differential)
SPEEDUP
15
DI
Speed test pin. Tie to analog gnd
ITEST
16
AB
open = use internal bias point
STBY
17
DI
Power saving standby mode (normally gnd)
AVDD18R
18
PP
Ouput Driver Power (1.8V)
AVSS18R
19
PG
Output Driver Ground
CKIN
20
DI
Sampling Clock Input
DO[9:0]
27~36
DO
10-bit Digitized Output
EOC
42
DO
End of conversion signal
STC
43
DI
Start of conversion signal
AVBB18D
44
DG
Digital Substrate Bias
AVSS18D
45,46
DG
Digital Ground
AVDD18D
47,48
DP
Digital Power (1.8V)
NOTES:
1. This information is for testing the provided test-chips of ADC1280X.
2. I/O
TYPE
PP
and
PG
denote
PAD
Power
and
PAD
Ground
respectively.
0.18
m 10-BIT 30MSPS ADC
ADC1280X
12
USER GUIDE
1. Input Signal Range
The ADC was designed to use both single and differential mode input, but the differential mode is recommended
to guarantee the operating margin in the low voltage condition.
Differential Mode Input Condition
Pin
Input Range
Conditions
AINT
0.5V 1.3V
AINC
1.3V 0.5V
180
phase shifted input with the same DC level with AINT
Single Mode Input Condition
Pin
Input Range
Conditions
AINT
0.2V 1.6V
AINC
0.9V
forced from the clean DC source or CML pin of adc1280x
2. Input Signal Speed
Normal speed range of adc1280x is 1~6MHz input quantized by 30MHz clock, which is fixed by a normal video
signal format. To use the input of adc1280x on near or over nyquist ranges such as the direct IF processing,
consult about the additional performance issues with SEC.
ADC1280X
0.18
m 10-BIT 30MSPS ADC
13
PHANTOM CELL INFORMATION
-- Pins of the core can be assigned externally (package pins) or internally (internal ports) depending on design
methods.
The term "External" implies that the pins should be assigned externally like power pins.
The term "External/Internal" implies that the applications of these pins depend on the user.
adc1280x
10-BIT 30MSPS ADC
AVSS18A
AVBB18A
AVDD18A
AVSS18A
AVBB18A
AVDD18A
REFTOP
CML
REFBOT
AINC
AINT
STBY
SPEEDUP
ITEST
DO[0]
STC
CKIN
DO[1]
DO[2]
DO[3]
DO[4]
DO[5]
DO[6]
DO[7]
DO[8]
DO[9]
EOC
AVSS18D
AVBB18D
AVDD18D
0.18
m 10-BIT 30MSPS ADC
ADC1280X
14
Pin Name
Pin Usage
Pin Layout Guide
AVDD18A
External
- Maintain the large width of lines as far as the pads.
AVSS18A
External
- Place the port positions to minimize the length of power lines.
AVBB18A
External
- Do not merge the analog powers with other powers from other
AVDD18A
External
blocks.
AVSS18D
External
- Use the clean power and ground source on board.
AVBB18D
External
AINT
External/Internal
- Do not overlap with digital lines.
AINC
External/Internal
- Maintain the shortest path to pads.
CKIN
External/Internal
- Separate from all other analog signals.
REFTOP
External/Internal
- Maintain the larger width and the shorter length as far as the pads.
REFBOT
External/Internal
- Separate from all other digital lines.
CML
External/Internal
ITEST
External/Internal
STBY
External/Internal
STC
External/Internal
SPEEDUP
External/Internal
EOC
External/Internal
- Separated from the analog clean signals if possible.
DO[9]
External/Internal
- Do not exceed the length by 1,000um.
DO[8]
External/Internal
DO[7]
External/Internal
DO[6]
External/Internal
DO[5]
External/Internal
DO[4]
External/Internal
DO[3]
External/Internal
DO[2]
External/Internal
DO[1]
External/Internal
DO[0]
External/Internal
ADC1280X
0.18
m 10-BIT 30MSPS ADC
15
FEEDBACK REQUEST
It should be quite helpful to our ADC core development if you specify your system requirements on ADC in the
following characteristic checking table and fill out the additional questions.
We appreciate your interest in our products. Thank you very much.
Characteristic
Min
Typ
Max
Unit
Remarks
Analog Power Supply Voltage
V
Digital Power Supply Voltage
V
Bit Resolution
Bit
Reference Input Voltage
V
Analog Input Voltage
V
PP
Operating Temperature
C
Integral Non-linearity Error
LSB
Differential Non-linearity Error
LSB
Bottom Offset Voltage Error
mV
Top Offset Voltage Error
mV
Maximum Conversion Rate
MSPS
Dynamic Supply Current
mA
Power Dissipation
mW
Signal-to-noise Ratio
dB
Pipeline Delay
CLK
Digital Output Format
(Provide detailed description & timing diagram)
1. Between single input-output and differential input-output configurations, which one is suitable for your system
and why?
2. Please comment on the internal/external pin configurations you want our ADC to have, if you have any reason to
prefer some type of configuration.
3. Freely list those functions you want to be implemented in our ADC, if you have any.
0.18
m 10-BIT 30MSPS ADC
ADC1280X
16
HISTORY CARD
Version
Date
Modified Items
Comments
ver 1.0
00.7.4
Original version published (preliminary)
ver 1.1
01.3.10
Change the reference range from "0.6V~1.2V" to "0.5V~1.3V"
ver 2.0
01.7.2
Release the formal datasheet
ver 2.1
01.8.1
Add "td" spec
ver 2.2
02.5.1
Change the Operating Temperature Range from 0~70
C to -40~85
C
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