HTML datasheet архив (поиск документации на электронные компоненты) Поиск даташита (1.687.043 компонентов)
Где искать

Datasheet: L2821 (Polyfet RF Devices)

Silicon Gate Enhancement Mode Rf Power Ldmos Transistor

 

Скачать: PDF   ZIP
Polyfet RF Devices
polyfet rf devices
L2821
13
Single Ended
S02
24.0
2.0
33.0
3.40 C/W
36
1.0
7.50
1.0
50
0.60
3.00
5.0
50
0.10
36
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TEST CONDITIONS
Common Source Power Gain
Drain Efficiency
Total
Device
Dissipation
Junction to
Case Thermal
Resistance
Maximum
Junction
Temperature
Storage
Temperature
DC Drain
Current
Drain to
Source
Voltage
Gate to
Source
Voltage
-65 C to 150 C
200 C
A
V
Load Mismatch Tolerance
VSWR
Drain to
Gate
Voltage
20:1
Relative
0.20
0.10
Ids =
mA, Vgs = 0V
V, Vgs = 0V
Ciss
Crss
Coss
Vds =
Idq =
A, Vds = V, F =
0.20
Bvdss
Idss
Drain Breakdown Voltage
V
mA
pF
pF
pF
Common Source Output Capacitance
Common Source Feedback Capacitance
Idq =
Idq = 0.20
500
Vgs = 20V, Ids =
Rdson
Saturation Resistance
Forward Transconductance
gM
Vds = 10V, Vgs = 5V
POLYFET RF DEVICES
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com
500
500
Common Source Input Capacitance
36
V
Igss
Vgs
Idsat
Zero Bias Drain Current
Gate Leakage Current
Gate Bias for Drain Current
Saturation Current
1
7
uA
V
Mho
Ohm
Amp
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TEST CONDITIONS
ELECTRICAL CHARACTERISTICS ( EACH SIDE )
RF CHARACTERISTICS (
8.0
ABSOLUTE MAXIMUM RATINGS ( T =
Gps
12.5
A, Vds = V, F =
A, Vds = V, F =
12.5
12.5
Watts
V
1
MHz
MHz
MHz
Watts
Package Style
8.0
Vds = 0V Vgs = 30V
Vgs = 20V, Vds = 10V
HIGH EFFICIENCY, LINEAR
HIGH GAIN, LOW NOISE
General Description
12.5
Vds =
A, Vgs = Vds
Ids =
A
dB
%
o
o
o
o
o
Silicon VDMOS and LDMOS
transistors designed specifically
for broadband RF applications.
Suitable for Militry Radios,
Cellular and Paging Amplifier Base
Stations, Broadcast FM/AM, MRI,
Laser Driver and others.
"Polyfet" process features
low feedback and output capacitances
resulting in high F transistors with high
input impedance and high efficiency.
TM
t
SILICON GATE ENHANCEMENT MODE
RF POWER
TRANSISTOR
LDMOS
Vgs = 0V, F = 1 MHz
12.5
Vds =
Vgs = 0V, F = 1 MHz
12.5
Vds =
Vgs = 0V, F = 1 MHz
12.5
REVISION 04/27/2001
20
25 C )
WATTS OUTPUT )
L2C 1 DIE ID, GM vs VG
0.1
1
10
100
0
2
4
6
8
10
12
14
Vgs in Volts
ID
GM
L2C1DIE CAPACITANCE
1
10
100
0
2
4
6
8
10
12
14
VDS IN VOLTS
Coss
Ciss
Crss
L 2 8 2 1 P i n v s P o u t F = 5 0 0 M H Z , V D S = 1 2 . 5 V , I d q = . 2 A
0
2
4
6
8
10
12
0
0.5
1
1.5
2
P i n i n W a t t s
6.00
8.00
10.00
12.00
14.00
16.00
18.00
20.00
Pout
Gain
Efficiency@8W=46%
POLYFET RF DEVICES
POUT VS PIN GRAPH
CAPACITANCE VS VOLTAGE
ID & GM VS VGS
IV CURVE
Zin Zout
PACKAGE DIMENSIONS IN INCHES
L2821
L2C 1 DIE IV
0
1
2
3
4
5
6
7
8
9
0
2
4
6
8
10
12
14
16
18
20
VDS IN VOLTS
ID IN AMPS
vg=2v
Vg=4v
Vg=6v
vg=8v
vg=10v
vg=12v
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com
REVISION 04/27/2001
Tolerance .XX +/-0.01 .XXX +/-.005 inches
© 2018 • ChipFind
Контакты
Главная страница