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Datasheet: PI3A412 (Pericom Semiconductor Corporation)

0.4ohm, 3.3v, Quad Spdt Analog Switch

 

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Pericom Semiconductor Corporation
1
PS8834 05/22/06
COMPANY CONFIDENTIAL
Features
CMOS Technology for Bus and Analog Applications
Low On-Resistance: 0.4 (+2.7V Supply)
Wide V
CC
Range: +1.6V to +4.2V 10%
I
CC
= 0.3A @ T
A
= +25C
Rail-to-Rail switching throughout Signal Range
Fast Switching Speed: 20ns TYP. at 3.3V
High Off Isolation: -65dB
Crosstalk Rejection: -65dB
Extended Industrial Temperature Range: 40
C to 85
C
Packaging: ( Pb-free & Green)
16-contact TQFN (ZL), 2.5mm x 2.5mm
16-contact TQFN (ZH), 3.0mm x 3.0mm
Applications
Cell Phones
PDAs
Portable Instrumentation
Battery Powered
Communications
Computer Peripherals
PI3A412
0.4, 3.3V, Quad SPDT Analog Switch
Description
The PI3A412 is a quad single-pole double-throw (SPDT) CMOS
switch. It can be used as an analog switch or as a low-delay bus
switch. Specified over a wide operating power supply voltage
range, +1.6V to +4.2V, the switch has an On-Resistance of 0.4
at 2.7V.
Control inputs, Ax, tolerates input drive signals up to 5V, indepen-
dent of supply voltage.
Pin Configuration
(top view)
Audio & Video Signal Routing
PCMCIA Cards
Modems
Hard Drives
JTAG Testing
NC
4
V
CC
NO
1
COM
1
GND
COM
3
NO
3
GND
NC
2
NC
1
A
0
NO
2
COM
2
COM
4
NO
4
A
1
NC
3
1
2
3
4
12
11
10
9
16 15 14 13
5 6 7 8
Block Diagram
06-0068
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PS8834 05/22/06
PI3A412
0.4, 3.3V, Quad SPDT Analog Switch
COMPANY CONFIDENTIAL
Caution: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a
stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of
this specification is not implied.
Absolute Maximum Ratings
Voltages Referenced to GND
V
CC
...................................................................... 1.5V to +4.6V
V
NOx
, V
NCx
, V
COMx,
V
Ax
(1)
.......................0.5V to V
+
+0.3V
or 30mA, whichever occurs first
Current (any terminal)................................................... 200mA
Peak Current, V
NC +
V
NO
(Pulsed at 1ms, 10% duty cycle)................................... 400mA
Note 1: Signals on NC, NO, COM, or A exceeding V
CC
or GND are clamped by internal diodes. Limit forward diode current to 30mA.
Thermal Information
Continuous Power Dissipation
16-pin Thin QFN (derate 7.1mW/C above +70C)............ 0.5W
Storage Temperature ........................................65C to +150C
Lead Temperature (soldering, 10s) ................................. +300C
Pin Description
Pin #
Name
Description
4, 8, 12, 16
COM
X
Common Output / Data Port
1, 5, 9, 13
NC
X
Data Port (normally connect)
3, 7, 11, 15
NO
X
Data Port (normally open)
2, 10
A
0
,
A
1
Logic Input Control
6
GND
Ground
14
V
CC
Positive Power Supply
Function Tables
A
0
Function
A
1
Function
0
NC
X
Connected to
COM
X
0
NC
Y
Connected to
COM
Y
1
NO
X
Connected to
COM
X
1
NO
Y
Connected to
COM
Y
Notes :
1. X = 1, 2, 3, or 4
Notes :
1. X = 1 or 2
2. Y = 3 or 4
06-0068
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PS8834 05/22/06
PI3A412
0.4, 3.3V, Quad SPDT Analog Switch
COMPANY CONFIDENTIAL
Electrical Specifications - Single +3.3V Supply
(V
CC
= +3.3V 10%, GND = 0V, V
IH
= 1.3V, V
IL
= 0.5V) (T
A
= 40C to +85C)
Parameter
Symbol
Conditions
Min.
(1)
Typ.
(2)
Max.
(1)
Units
Analog Signal Range
(3)
V
ANALOG
0
V
CC
V
On Resistance
R
ON
V
CC
= 2.7V, I
COM
= 100mA,
V
IN
= +1.5V
0.4
0.6
On-Resistance Match
Between Channels
(4)
R
ON
0.08
0.09
On-Resistance Flatness
(5)
R
FLAT(ON)
V
CC
= 2.7V, I
COMx
= 100mA,
V
IN
= 0.8V, 2.0V
0.1
0.15
Off Leakage Current
(6)
I
NC
(off)
or
I
NO
(off)
V
CC
= 3.6V
V
NO
or V
NC
= 0.3V, 3.3V
-400
400
nA
On Leakage Current
(6)
I
COMx (on)
V
CC
= 3.6V,
V
COMx
= 0.3V, 3.3V
-400
400
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are T
A
= 25C, V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4. R
ON
=
R
ON
match between channels
5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25C.
Electrical Specifications - Single +4.2V Supply
(V
CC
= +4.2V 10%, GND = 0V, V
IH
= 1.6V, V
IL
= 0.7V) (T
A
= 40C to +85C)
Parameter
Symbol
Conditions
Min.
(1)
Typ.
(2)
Max.
(1)
Units
Analog Signal Range
(3)
V
ANALOG
0
V
CC
V
On Resistance
R
ON
V
CC
= 4.0V, I
COMx
= 100mA,
V
IN
= +1.5V
0.4
0.6
On-Resistance Match
Between Channels
(4)
R
ON
0.08
0.09
On-Resistance Flatness
(5)
R
FLAT(ON)
V
CC
= 4.0V, I
COMx
= 100mA,
V
IN
= 0.8V, 2.0V
0.1
0.15
Off Leakage Current
(6)
I
NC
(off)
or
I
NO
(off)
V
CC
= 4.4V,
V
NO
or V
NC
= 0.3V, 3.3V
-400
400
nA
On Leakage Current
(6)
I
COMx
(on) V
CC
= 4.4V,
V
COMx
= 0.3V, 3.3V
-400
400
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values ar
e T
A
= 25C, V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4. R
ON
=
R
ON
match between channels
5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25C.
06-0068
4
PS8834 05/22/06
PI3A412
0.4, 3.3V, Quad SPDT Analog Switch
COMPANY CONFIDENTIAL
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are T
A
= 25C, V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4. Off Isolation = 20log
10
[ (V
NO
or V
NC
) /
V
COM
]. See Figure 5.
5. Between any two switches. See Figure 6.
Electrical Specifications - Single +4.2V Supply
(V
CC
= +4.2V 10%, GND = 0V, V
IH
= 1.6V, V
IL
= 0.7V) (T
A
= 40C to +85C)
Description
Parameter
Test Conditions
Min.
(1)
Typ.
(2)
Max.
(1)
Unit
Logic Input
Input High Voltage
V
IH
Guaranteed logic High Level
1.6
V
Input Low Voltage
V
IL
Guaranteed logic Low Level
0.7
Input Current with Voltage High
I
AH
V
A
= 1.4V, all others = 0.5V
1
1
A
Input Current with Voltage Low
I
AL
V
A
= 0.5V, all other = 1.4V
1
1
Dynamic
Turn-On Time
t
ON
V
CC
= 4.2V, V
COM
= 2.0V, Figure 1 & 2
20
25
ns
Turn-Off Time
t
OFF
12
15
Break-Before-Make
t
BBM
V
IN
= 1.5V,
R
L
= 50,
C
L
= 35pF, See Figure 3
1
12
15
Charge Injection
(3)
Q
C
L
= 1nF, V
GEN
= 0V,
R
GEN
= 0, Figure 4
100
pC
Off Isolation
(4)
O
IRR
R
L
= 50, f = 100kHz, Figure 5
-65
dB
Cross Talk
(5)
X
TALK
R
L
= 50, f = 100kHz, Figure 6
-65
3dB Bandwidth
f
3db
See Test Circuit Figure 9
40
MHz
Off Capacitance
C
NC(OFF)
f = 1 MHz, Figure 7
50
pF
Off Capacitance
C
NO(OFF)
50
On Capacitance
C
ON
f = 1 MHz, Figure 8
135
Supply
Power-Supply Range
V
CC
1.5
4.4
V
Positve Supply Current
I
CC
V
CC
= 4.2V, V
A
= 0V or V
CC
0.5
A
06-0068
5
PS8834 05/22/06
PI3A412
0.4, 3.3V, Quad SPDT Analog Switch
COMPANY CONFIDENTIAL
Electrical Specifications - Single +3.3V Supply
(V
CC
= +3.3V 10%, GND = 0V, V
IH
= 1.3V, V
IL
= 0.5V) (T
A
= 40C to +85C)
Description
Param-
eters
Test Conditions
Min.
(1)
Typ.
(2)
Max.
(1)
Units
Logic Input
Input High Voltage
V
IH
Guaranteed logic High Level
1.3
V
Input Low Voltage
V
IL
Guaranteed logic Low Level
0.5
Input Current with Voltage High
I
AH
V
A
= 1.4V, all others = 0.5V
1
1
A
Input Current with Voltage Low
I
AL
V
A
= 0.5V, all other = 1.4V
1
1
Dynamic
Turn-On Time
t
ON
V
CC
= 3.3V, V
COM
= 2.0V, Figure 1 & 2
20
25
ns
Turn-Off Time
t
OFF
12
15
Break-Before-Make
t
BBM
V
IN
= 1.5V,
R
L
= 50,
C
L
= 35pF, See Figure 3
1
12
15
Charge Injection
(3)
Q
C
L
= 1nF, V
GEN
= 0V,
R
GEN
= 0, Figure 4
100
pC
Off Isolation
(4)
O
IRR
R
L
= 50, f = 100kHz, Figure 5
-65
dB
Cross Talk
(5)
X
TALK
R
L
= 50, f = 100kHz, Figure 6
-65
3dB Bandwidth
f
3db
See Test Circiut Figure 9
40
MHz
Off Capacitance
C
NC(OFF)
f = 1 MHz, Figure 7
50
pF
Off Capacitance
C
NO(OFF)
50
On Capacitance
C
ON
f = 1 MHz, Figure 8
135
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4. Off Isolation = 20log
10
[ (V
NO
or V
NC
) /
V
COM
]. See Figure 5.
5. Between any two switches. See Figure 6.
06-0068
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