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Datasheet: P174FCT2273T (Pericom Semiconductor Corporation)

Fast Cmos Octal D Flip-flop With Master Reset

 

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Pericom Semiconductor Corporation
1
PS2013A 03/09/96
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PI74FCT273T
(25
Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Product Description
Pericom Semiconductor's PI74FCT series of logic circuits are pro-
duced in the Company's advanced 0.6/0.8 micron CMOS
technology, achieving industry leading speed grades. All
PI74FCT2XXX devices have a built-in 25-ohm series resistor on
all outputs to reduce noise because of reflections, thus eliminating
the need for an external terminating resistor.
The PI74FCT273T and PI74FCT2273T is an 8-bit wide octal
designed with eight edge-triggered D-type flip-flops with individual
D inputs and O outputs. The common buffered Clock (CP) and
Master Reset (MR) load and resets (clear) all flip-flops
simultaneously. The register is fully edge-triggered. The D input
state, one setup time before the LOW-to-HIGH clock transition, is
transferred to the corresponding flip-flop's O output. All outputs
will be forced LOW independently of Clock or Data inputs by a
LOW voltage level on the MR input.
Device models available upon request.
Fast CMOS Octal D Flip-Flop
with Master Reset
Logic Block Diagram
Inputs
Outputs
Mode
MR
CP
D
N
O
N
Reset (Clear)
L
X
X
L
Load "1"
H
h
H
Load "0"
H
l
L
Truth Table
(1)
Pin Name
Description
MR
Master Reset (Active LOW)
CP
Clock Pulse Input
(Active Rising Edge)
D
0
-D
7
Data Inputs
O
0
-O
7
Data Outputs
GND
Ground
V
CC
Power
Product Pin Description
Product Pin Configuration
1. H = High Voltage Level
h = High Voltage Level one setup time
prior to the LOW-to-HIGH Clock
transition
L = Low Voltage Level
l = LOW Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
X = Don't Care
= LOW-to-HIGH Clock Transition
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PI74FCT273T
(25
(25
(25
(25
(25
Series) PI74FCT2273T
Product Features
PI74FCT273/2273T is pin compatible with bipolar FASTTM
Series at a higher speed and lower power consumption
25
series resistor on all outputs (FCT2XXX only)
TTL input and output levels
Low ground bounce outputs
Extremely low static power
Hysteresis on all inputs
Industrial operating temperature range: 40C to +85C
Packages available:
20-pin 173 mil wide plastic TSSOP (L)
20-pin 300 mil wide plastic DIP (P)
20-pin 150 mil wide plastic QSOP (Q)
20-pin 150 mil wide plastic TQSOP (R)
20-pin 300 mil wide plastic SOIC (S)
D
R
D
D
0
O
0
CP
CP
MR
Q
D
R
D
D
1
O
1
CP
Q
D
R
D
D
2
O
2
CP
Q
D
R
D
D
3
O
3
CP
Q
D
R
D
D
4
O
4
CP
Q
D
R
D
D
5
O
5
CP
Q
D
R
D
D
6
O
6
CP
Q
D
R
D
D
7
O
7
CP
Q
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
MR
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
Vcc
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
20-PIN
L20
P20
Q20
R20
S20
2
PS2013A 03/09/96
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PI74FCT273T
(25
Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Storage Temperature ............................................................ 65C to +150C
Ambient Temperature with Power Applied ............................ -40C to +85C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ..... 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) .. 0.5V to +7.0V
DC Input Voltage .................................................................... 0.5V to +7.0V
DC Output Current .............................................................................. 120 mA
Power Dissipation ..................................................................................... 0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C, V
CC
= 5.0V 5%)
Parameters Description
Test Conditions
(1)
Min. Typ
(2)
Max. Units
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 15.0mA
2.4
3.0
V
V
OL
Output LOW Current
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 64mA
0.3
0.55
V
V
OL
Output LOW Current
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 12mA (25
Series)
0.3
0.50
V
V
IH
Input HIGH Voltage
Guaranteed Logic HIGH Level
2.0
V
V
IL
Input LOW Voltage
Guaranteed Logic LOW Level
0.8
V
I
IH
Input HIGH Current
V
CC
= Max.
V
IN
= V
CC
1
A
I
IL
Input LOW Current
V
CC
= Max.
V
IN
= GND
1
A
I
OZH
High Impedance
V
CC
= M
AX
.
V
OUT
= 2.7V
1
A
I
OZL
Output Current
V
OUT
= 0.5V
1
A
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
0.7
1.2
V
I
OFF
Power Down Disable
V
CC
= GND, V
OUT
= 4.5V
--
--
100
A
I
OS
Short Circuit Current
V
CC
= Max.
(3)
, V
OUT
= GND
60
120
mA
V
H
Input Hysteresis
200
mV
Capacitance
(T
A
= 25C, f = 1 MHz)
Parameters
(4)
Description
Test Conditions
Typ
Max.
Units
C
IN
Input Capacitance
V
IN
= 0V
6
10
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
12
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
3
PS2013A 03/09/96
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PI74FCT273T
(25
Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Power Supply Characteristics
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
I
CC
Quiescent Power
V
CC
= Max.
V
IN
= GND or V
CC
0.1
500
A
Supply Current
I
CC
Supply Current per
V
CC
= Max.
V
IN
= 3.4V
(3)
0.5
2.0
mA
per Input @ TTL HIGH
I
CCD
Supply Current per
V
CC
= Max., Outputs Open
V
IN
= V
CC
0.15
0.25
mA/
Input per MHx
(4)
MR = Vcc, One Input Toggling V
IN
= GND
MHz
50% Duty Cycle
I
C
Total Power Supply
V
CC
= Max., Outputs Open
V
IN
= V
CC
1.5
3.5
(5)
mA
Current
(6)
f
CP
= 10 MH
Z
, 50% Duty Cycle V
IN
= GND
MR = Vcc, 50% Duty Cycle
V
IN
= 3.4V
2.0
3.5
(5)
One Bit toggling at f
I
= 5 MH
Z
V
IN
= GND
V
CC
= Max., Outputs Open
V
IN
= V
CC
3.8
7.3
(5)
f
CP
= 10 MH
Z
, 50% Duty Cycle V
IN
= GND
MR = V
CC
, 50% Duty Cycle
V
IN
= 3.4V
Eight Bits toggling at
V
IN
= GND
6.0
16.3
(5)
f
I
= 2.5 MH
Z
, 50% Duty Cycle
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
4
PS2013A 03/09/96
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PI74FCT273T
(25
Series) P174FCT2273T
Octal D Flip-Flop with Master Reset
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter guaranteed but not production tested.
Switching Characteristics over Operating Range
273T/2273T
273AT/2273AT
273CT/2273CT
273DT
Com.
Com.
Com.
Com.
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
PLH
Propagation Delay
C
L
= 50pF
2.0
13.0
2.0
7.2
2.0
5.8
2.0
4.4
ns
t
PHL
CP to O
N
R
L
= 500
t
PHL
Propagation Delay
2.0
13.0
2.0
7.2
2.0
6.1
2.0
5.0
ns
t
PLH
MR to O
N
t
SU
Setup Time, HIGH or LOW
3.0
--
2.0
--
2.0
--
2.0
--
ns
Dn to CP
t
H
Hold Time, HIGH or LOW
2.0
--
1.5
--
1.5
--
1.5
--
ns
Dn to CP
tw
CP Pulse Width
(3)
7.0
--
6.0
--
6.0
--
3.0
--
ns
HIGH or LOW
t
W
MR Pulse Width
(3)
7.0
--
6.0
--
6.0
--
3.0
--
ns
LOW
t
REM
Recovery Time MR to CP
(3)
4.0
--
2.0
--
2.0
--
2.0
--
ns
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
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