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Datasheet: CS6702 (Myson Technology)

200Mbps Fiber-optic Post-amplifier/quantizer

 

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BLOCK DIAGRAM
GENERAL DESCRIPTION
FEATURES
CS6702
200Mbps Fiber-Optic Postamplifier/Quantizer
USA:
4020 Moorpark Avenue Suite 115
San Jose, CA, 95117
Tel: 408-243-8388 Fax: 408-243-3188
Sales@myson.com.tw
www.myson.com.tw
Rev.1.8 July 2003
page 1 of 1
Myson Century, Inc.
Taiwan:
No. 2, Industry East Rd. III,
Science-Based Industrial Park, Hsin-Chu, Taiwan
Tel: 886-3-578-4866 Fax: 886-3-578-4349
APPLICATIONS
Fully differential architecture. Input Sensitivity
spans 0.8mV to 500mV.
Minimum 200MHz bandwidth at 60dB maximum
gain.
Programmable input-signal level detection.
CMOS and PECL link status variants CS6702NC/
CS6702RC and CS6702N/CS6702R.
Pin-compatible with Microcosm MC2045-2.
Supports both 3.3 and 5 Volt operation.
Available as die, QSOP-16 or TSSOP-20 pack-
ages.
The CS6702 postamplifier is a high-gain, wide-
bandwidth limiting amplifier for up to 200Mbps fiber-
optic based communication applications. Inputs of
the CS6702 are differential and AC-coupled from the
transimpedance amplifier. Further, the inputs are
self-biased by internal circuits and the input offset
cancellation is accomplished using an external
capacitor connected between the CAZP and CAZN
pins.
The CS6702 includes a user programmable signal
strength detector, enabling the user to set the
threshold voltage at which the logic outputs are
enabled. The link detection output pins (LINKP/
LINKN) are available in both CMOS (CS6702NC/
CS6702RC) and PECL (CS6702N/CS6702R) output
interfaces. Data output of the CS6702 is differential
PECL. The output buffer can be gated using the JAM
pin.
SDH STM-1
SONET OC-3
ESCON Receivers
125 Mbps FDDI Receivers
155 Mbps LAN ATM Receivers
Fast Ethernet Receiver
CMP
CS6702
ECL
CMP
AMP
AMP
AMP
LEVEL
DETECTOR
BUFFER
ECL/CMOS
BUFFER
JAM
DOUTP
DOUTN
LINKP
LINKN
CAZN
CAZP
REFERENCE
CIRCUIT
DETECTION
THRESHOLD
12K
12K
VSET
DINN
DINP
PDET
10K
10K
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