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Datasheet: YMF721 (LSI Computer Systems)

Fm + Wavetable Synthesizer Lsi

 

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LSI Computer Systems
YMF721
OPL4-ML2
FM + Wavetable Synthesizer LSI
YAMAHA CORPORATION
July 10, 1997
YMF721 CATALOG
CATALOG No.:LSI-4MF721A20
Jury 10, 1997
OVERVIEW
YMF721 (OPL4-ML2) is a high quality and low cost Wavetable synthesizer LSI. YMF721 (OPL4-ML2)
integrates an OPL3 (FM synthesizer), General MIDI processor and 1 Mbyte Wavetable sample ROM into one
chip, and complies with General MIDI (GM) system level 1. Thus, it is best suited to multimedia applications,
sound cards, MIDI synthesis modules and other sound applications.
Since this LSI outputs stereophonic 16 bit digital signal (fs = 44.1 kHz), it can be connected directly with
YMF701B, 711 or 715 (OPL3-SA, SA2 or SA3) or with YAC516(DAC16-L).
Operating voltage, 3.3 V, allows this LSI to be controlled with notebook personal computers.
Power management functions (power down and suspend/resume functions) of OPL4-ML2 contribute to low
power consumption of personal computers into which this product is built-in.
FEATURES
The Wavetable synthesizer of this LSI is able to generate up to 24 types of sounds simultaneously.
Has an interface that makes this LSI compatible with MPU-401 UART mode.
Has an OPL3 (FM synthesizer) for AdLib/Sound Blaster applications.
Has a 1 Mbyte built-in Wavetable sample ROM.
Complies with GM system Level 1. (Thus, it is compatible with DOS applications that support MPU-401.)
MIDI signal can be transmitted either through serial input or parallel input.
FM synthesizer and Wavetable synthesizer of this LSI can generate their sound at the same time.
FM synthesizer is register-compatible with OPL3.
All registers are readable.
Power management functions included power down and suspend/resume can be supported.
Frequency of master clock signal is 33.8688 MHz.
Pin compatible with YMF704C-S (100 pin SQPF)
Voltage of power supply can be 5.0 V or 3.3 V.
Silicone gate CMOS process
100-pin SQFP (YMF721-S).
GENERAL MIDI logo is a trademark of Association of Musical Electronics Industry (AMEI), and
indicates GM system level 1 Compliant.
YMF721
July 10, 1997
- 2 -
PIN CONFIGURATION
YMF721-S
100 pin SQFP Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
VDD
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
VSS
XO
XI
5V
/3V
AD
B
7
AD
B
6
VSS
AD
B
5
AD
B
4
AD
B
3
AD
B
2
AD
B
1
AD
B
0
AI
R
Q
RS
T
/I
O
W
/I
O
R
VSS
A2
A1
A0
/O
P
L
CS
VDD
/MP
U
CS
AR
D
Y
AB
D
I
R
WC
O
LR
O
DO3
DO2
DO1
DO0
BCO
CL
K
O
/
P
DOUT
RX
D
FS
P
VDD
T0
T1
T2
T3
T4
T5
T6
T7
/T
ES
T
A
/T
ES
T
B
/T
ES
T
/T
ES
T
3
VSS
VSS
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
VSS
VDD
N.C.
VSS
/TEST2
/RESETSEL
TD7
TD6
TD5
TD4
TD3
TD2
TD1
TD0
YMF721
July 10, 1997
- 3 -
PIN DESCRIPTION
ISA bus interface : 19 pins
Pin name
pins
I/O
Type
Size
Function
ADB7-0
8
I/O
TTL
2mA
Data bus
A2-0
3
I
TTL
-
Address bus
/MPUCS
1
I
TTL
-
MPU401 chip select
/OPLCS
1
I
TTL
-
FM/Wavetable/Command/Control chip select
/IOW
1
I
TTL
-
Write enable
/IOR
1
I
TTL
-
Read enable
RST
1
I
TTL
-
Initial clear input
AIRQ
1
O
TTL
2mA
Interrupt signal ("H" : Interrupt)
ABDIR
1
O
TTL
2mA
Selection of data transfer direction
("L" : YMF721
Host)
ARDY
1
OD
TTL
12mA
I/O channel ready/busy selection ("L" : Busy)
MIDI interface : 2 pins
Pin name
pins
I/O
Type
Size
Function
RXD
1
I
TTL
-
MIDI serial data input
FSP
1
I
TTL
-
Selection of MIDI serial/parallel transmission
("H" : Parallel, "L" : Serial)
Serial audio interface : 8 pins
Pin name
pins
I/O
Type
Size
Function
CLKO
1
O
CMOS
8mA
Clock output (384fs = 16.9344MHz)
BCO
1
O
CMOS
2mA
Bit clock output (48fs = 2.1168MHz)
LRO
1
O
CMOS
2mA
L/R clock output (fs = 44.1kHz)
WCO
1
O
CMOS
2mA
Word clock output (2fs = 88.2kHz)
DO3
1
O
CMOS
2mA
Effect send output
DO2
1
O
CMOS
2mA
MIX (FM + Wavetable) output
DO1
1
O
CMOS
2mA
Wavetable output
DO0
1
O
CMOS
2mA
FM output
YMF721
July 10, 1997
- 4 -
Others : 39 pins
Pin name
pins
I/O
Type
Size
Function
5V/3V
1
I
CMOS
-
Selection of power supply
/RESETSEL
1
I+
TTL
-
RST signal polarity control pin
(When this pin is at "L", RST is active at "L".)
/PDOUT
1
O
CMOS
2mA
Power down control output
XI
1
I
CMOS
2mA
Crystal oscillator connection or master clock input
(33.8688 MHz)
XO
1
O
CMOS
2mA
Crystal oscillator connection pin
N.C.
34
-
-
-
To be open at normal use.
LSI test pins : 21 pins
Pin name
pins
I/O
Type
Size
Function
/TESTA
1
I+
TTL
-
To be open at normal use.
/TESTB
1
I+
TTL
-
To be open at normal use.
/TEST
1
I+
TTL
-
To be open at normal use.
/TEST2
1
I+
TTL
-
To be open at normal use.
/TEST3
1
I+
TTL
-
To be open at normal use.
T7-0
8
O
CMOS
2mA
To be open at normal use.
TD7-0
8
I/O
CMOS
2mA
To be open at normal use.
Power supply, ground : 11 pins
Pin name
pins
I/O
Type
Size
Function
VDD
4
-
-
-
Power supply (put on +5.0 V or +3.3V)
VSS
7
-
-
-
Ground
Total : 100 pins
Note : I+ : Input pin with built-in pull-up resistor, OD : Open drain output pin
YMF721
July 10, 1997
- 5 -
BLOCK DIAGRAM
OPL3
FM Synthesizer
Wavetable
Synthesizer
ISA BUS
Interface
Sy
nthe
s
i
z
e
r
T
i
m
i
ng
C
ontr
o
l
TEST
Logic
Decode
Logic
Timing
Generator
Synthesizer
Interface
(arbitration etc.)
UART
Register
Control
(MPU/Command
/Control)
Micro Processor
MIDI Interpreter
Command Interpreter
Wave ROM
1M byte
MI
X(
F
M
+Wav
e)
ROM
256kbit
SRAM
32kbit
AB
D
I
R
AI
R
Q
AR
D
Y
5V
/3V
/T
ES
T
/T
ES
T
2
/T
ES
T
3
/T
ES
T
A
/T
ES
T
B
T[
7
-
0
TD
[
7
-
0
]
VDD
VSS
XO
XI
RXD
/RESETSEL
FSP
RST
/IOW,/IOR
/MPUCS,/OPLCS
A[2-0]
ADB[7-0]
DO3
DO1
DO2
DO0
/PDOUT
CLKO
BCO
LRO
WCO
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