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Datasheet: KL5KUSB116 (Kawasaki Microelectronics)

Usb to Serial

 

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KL5KUSB116
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
1
Ver. 2.1
USB to Serial
Description
The Kawasaki USB to Serial enables your system to have the capability to communicate between the
USB (Universal Serial Bus) port and serial port peripherals. This device meets the USB 1.0/1.1 and
standard serial port specifications. All the advantages of USB are available to peripherals with serial port
interface such as plug and play capabilities. With the USB Standard of high-speed data transfers, this
device is ideal for connections to high-speed modems or ISDN terminal adapters. Kawasaki's device and
software enable the USB interface to be transparent to the peripheral and requires no firmware changes.
This makes it possible for peripherals with serial interfaces to easily interface with USB with minimum
modifications. This feature is ideal for Legacy applications.
Features
Advanced 16 Bit processor for USB transaction
processing and control data processing
Compliant with the USB 1.0/1.1 (Universal
Serial Bus)
Serial Port
230kbps
128 byte FIFO
Plug and Play compatible
I
2
C interface
Utilizes low cost external crystal circuitry
1.5K x 16 internal RAM buffer for fast
communications
Debug UART for debug and code development
USB host device drivers available
Single-chip solution in a 44 pin QFP
Block Diagram
PLL & Clock
Generator
16 Bit Address / Data Bus
16 Bit
Processor
Serial
Interface
Engine
RAM
(3KB)
Timer 0
USB
Interface
Mask
ROM
EEPROM
Serial
Interface
Timer 1
VP
VM
CLK
X2
SCL
SDA
Watchdog
Timer
Debug
UART
UART_Txd
UART_Rxd
DTR
RTS
DCD
DSR
Txd
Rxd
CTS
RI
Serial
Interface
(4)
Channel 1
KL5KUSB116
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
2
Ver. 2.1
USB to Serial
KL5KUSB116 Application Block Diagram
Pin Diagram 44QFP
Optional
External
Memory
USB
Serial Port
Serial
Device
Serial
EEPROM
KL5KUSB116
USB Serial
XD_0
XD_1
XD_2
XD_3
GND
XD_4
XD_5
XD_6
GND
XD_7
VDD
VDD
SDA PU_1
GPIO_31 GPIO_29
RI
nPWR
_PWN
UART_TXD
GND
VP VM
X2
CLK
TXD
UART_TXD
PLLEN
VDD
CP_OUT
V CO_IN
GND
SCL
VDD
nTEST nRESET
GND DCD
DSR CTS
DTR RTS
RXD GND
VDD
KL5KUSB116
34
35
36
37
38
39
40
41
42
43
44
22
21
20
19
18
17
16
15
14
13
12
33
32 31
30 29
28 27
26 25
24 23
1 2
3 4
5 6
7 8
9 10
11
KL5KUSB116
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
3
Ver. 2.1
USB to Serial
Pin Description
Pin #
LQFP
I/O
Pin Name
Description
1
VDD
VDD
2
IN/OUT
SDA
Serial EEPROM serial data. Connect to EEPROM/SDA
3
IN
PU_1
Pull-up to USB +Pin for High Speed
4
IN/OUT
GPIO_31
GPIO_31
5
IN/OUT
GPIO_29
GPIO_29
6
IN
RI
Ring Indicate
7
OUT
nPWR_DWN
Active low Powerdown mode signal
8
IN
UART_TXD
Debug UART Txd
9
GND
Ground
10
IN/OUT
VP
USB +Pin
11
IN/OUT
VM
USB -Pin
12
VDD
VDD
13
IN/OUT
SCL
Serial EEPROM clock. Connect to EEPROM/SCL
14
GND
Ground
15
IN
VCO_IN
PLL VCO In
16
OUT
CP_OUT
PLL VDO Out
17
VDD
VDD
18
IN
PLLEN
PLL Enable
19
IN
UART_RXD
Debug UART Rxd
20
OUT
TXD
Transmit Data
21
IN
CLK
12MHz Clock/Crystal Input
22
OUT
X2
12MHz Crystal Output
23
VDD
VDD
24
GND
Ground
25
IN
RXD
Receive Data
26
OUT
RTS
Request To Send
27
OUT
DTR
Data Terminal Ready
28
IN
CTS
Clear To Send
29
IN
DSR
Data Set Ready
30
IN
DCD
Data Carrier Detect
31
GND
Ground
32
IN
nRESET
Reset Pin
33
IN
nTEST
Test Pin. Disconnect for normal operation.
34
IN/OUT
XD_0*
External Data Pins
35
IN/OUT
XD_1*
External Data Pins
36
IN/OUT
XD_2*
External Data Pins
37
IN/OUT
XD_3*
External Data Pins
38
GND
Ground
39
IN/OUT
XD_4*
External Data Pins
40
IN/OUT
XD_5*
External Data Pins
41
IN/OUT
XD_6*
External Data Pins
42
GND
Ground
43
IN/OUT
XD_7*
External Data Pins
44
VDD
VDD
*Pins are 5V tolerant
KL5KUSB116
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
4
Ver. 2.1
USB to Serial
Function Description
16 Bit Processor
The integrated 16 bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system. The masked ROM in the this device or
external memory contains a specialized instruction set that has been designed for highly efficient
coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
Buffer, external memory, I/O interfaces, and all the control and status registers
The processor supports prioritized vectored hardware interrupts and has as many as 240
software interrupt vectors.
The processor provides six addressing modes, supporting memory-to-memory, memory-to-
register, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions.
All instructions are sixteen bits wide, although some instructions require operands, which may
occupy another one or two words. Several special " short immediate" instructions are available,
so that certain frequently used operations with small constant operand will fit into a 16-bit
instruction.
The Processor Divide/Multiply function
The processor's divide/multiply function contains all the instructions of the base processor that
additionally includes integer divide and multiply instructions. A signed multiply instructions takes
two 16-bit operands and returns a 32-bit result. A signed divide instruction divides a 32-bit
operand by a 16-bit operand.
RAM Buffer
The USB controller contains internal buffer memory. The memory is used to buffer data and USB
packets and accessed by the 16 Bit processor and the SIE. USB transactions are automatically
routed to the memory buffer. The 16-bit processor has the ability to set up pointers and block
sizes in buffer memory for USB transactions. Data is read from the interface and is processed
and packetized by the 16-bit I/O processor.
KL5KUSB116
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
5
Ver. 2.1
USB to Serial
PLL Clock Generator
The PLL circuitry is provided to generate the internal 48MHz clock. This circuitry is designed to
allow use of a low cost 12 MHz external crystal which is connected to CLK and X2. If an external
12 MHz clock is available in the application, it may be used in lieu of the crystal circuit and
connected directly to the CLK input pin.
USB Interface
The USB controller meets the Universal Serial Bus (USB) specification ver 1.0/1.1. The
transceiver is capable of transmitting and receiving serial data at the USB's full speed, 12
Mbits/sec data rate. The driver portion of the transceiver is differential, while the receive section
is comprised of a differential receiver and two single ended receivers. Internally, the transceiver
interfaces to the SIE logic. Externally, the transceiver connects to the physical layer of the USB.
UART Serial Interface
One UART serial port is provided. The port can be configured for a wide selection of baud rates,
300 to 230.4 K baud, and support a set of control signals. The UART provides a means for
external serial devices to access the USB.
Debug UART
An independent UART serial port is provided for debug and code development. The port can be
configured for a wide selection of baud rates, 7200 to 115.2K baud. The port provides transmit
and receive data support only.
Serial EEPROM Support
The USB Controller serial interface is used to provide access to external EEPROM's. The
interface can support a variety of serial EEPROM formats.
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