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Datasheet: KL5KUSB105 (Kawasaki Microelectronics)

Usb to 4 Serial Ports

 

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KL5KUSB105
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
1
Ver. 1.8
USB to 4 Serial Ports
Description
The Kawasaki USB to 4 Serial enables your system to have the capability to communicate between the
USB (Universal Serial Bus) port and up to four serial port peripherals. This device meets the USB 1.0/1.1
and standard serial port specifications. All the advantages of USB are available to peripherals with serial
port interface such as plug and play capabilities. With the USB Standard of high-speed data transfers, this
device is ideal for connections to high-speed modems or ISDN terminal adapters. Kawasaki's device and
software enable the USB interface to be transparent to the peripheral and requires no firmware changes.
This makes it possible for peripherals with serial interfaces to easily interface with USB with minimum
modifications. This feature is ideal for Legacy applications.
Features
Advanced 16 Bit processor for USB transaction
processing and control data processing
Compliant with the USB 1.0/1.1 (Universal
Serial Bus)
4 Serial Port
230kbps
128 byte FIFO
Plug and Play compatible
I
2
C interface
Utilizes low cost external crystal circuitry
1.5K x 16 internal RAM buffer for fast
communications
Debug UART for debug and code development
USB host device drivers available
Single-chip solution in a 100 pin LQFP
Block Diagram
Serial
Interface
Serial
Interface
Serial
Interface
PLL & Clock
Generator
16 Bit Address / Data Bus
16 Bit
Processor
Serial
Interface
Engine
RAM
(3KB)
Timer 0
USB
Interface
Mask
ROM
EEPROM
Serial
Interface
Timer 1
VP
VM
CLK
X2
SCL
SDA
Watchdog
Timer
Debug
UART
Txd
Rxd
DTR
RTS
DCD
DSR
Txd
Rxd
CTS
RI
Serial
Interface
(4)
Channel 1
Channel 3
Channel 4
Channel 2
KL5KUSB105
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
2
Ver. 1.8
USB to 4 Serial Ports
KL5KUSB105 Application Block Diagram
Pin Diagram 100LQFP
Optional
External
Memory
Serial Port
USB
Serial
Device
Serial
EEPROM
Serial Port
Serial Port
Serial Port
KL5KUSB105
USB / 4
Serial
Serial
Device
Serial
Device
Serial
Device
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100
99 98
97 96
95 94
93 92
91 90
89 88
87 86
85 84
83 82
81 80
79 78
77 76
26 27
28 29
30 31
32 33
34 35
36 37
38 39
40 41
42 43
44 45
46 47
48 49
50
KL5KUSB105
100 LQFP
VDD
SDA
PU#1
UART4_DCD
UART4_DSR
UART4_CTS
UART4_DTR
UART4_RTS
UART4_Rxd
UART4_Txd
UART3_RI
nPWR_DWN
GND
UART1_Txd
UART1_Rxd
UART1_RTS
UART1_DTR
UART1_CTS
UART1_DSR
UART1_DCD
UART1_RI
nTXD
GND
VP
VM
VDD N/C
SCL GND
VCO_IN CP_OUT
VDD
PLLEN
nRXD
N/C
N/C
UART2_Txd
UART2_Rxd UART2_RTS UART2_DTR UART2_CTS UART2_DSR UART2_DCD
UART2_RI
UART3_Txd
GND CLK
X2
XA_15
VDD
XA_7
XA_6
XA_5
XA_4
XA_3
XA_2
XA_1
GND
nNTST
nNRESET
nXROMSEL
nXWR
nXRD
UART3_DCD
UART3_DSR
UART3_CTS
UART3_DTR
UART3_RTS
UART3_Rxd
nXRAMSEL
GND
nXBHE
XA_0
XA_14
VDD
VDD
XD_15 XD_14
GND XD_13
XD_12 XD_11
XD_10 XD_9
XD_8 XD_7
XD_6 XD_5
XD_4 XD_3
XD_2 XD_1
XD_0 GND
XA_13 XA_12
XA_11 XA_10
XA_9 XA_8
KL5KUSB105
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
3
Ver. 1.8
USB to 4 Serial Ports
Pin Description
Pin #
LQFP
I/O
Pin Name
Description
1
VDD
VDD
2
IN/OUT
SDA*
Serial EEPROM serial data. Connect to EEPROM/SDA
3
IN
PU#1*
Pull up to USB +Pin for High Speed
4
IN
UART4_DCD*
Data Carrier Detect
5
IN
UART4_DSR*
Data Set Ready
6
IN
UART4_CTS*
Clear To Send
7
OUT
UART4_DTR*
Data Terminal Ready
8
OUT
UART4_RTS*
Request To Send
9
IN
UART4_Rxd*
Receive Data
10
OUT
UART4_Txd*
Transmit Data
11
IN
UART3_RI*
Ring Indicate
12
OUT
nPWR_DWN*
Active low Powerdown mode signal
13
GND
GND
14
OUT
UART1_Txd*
Transmit Data
15
IN
UART1_Rxd*
Receive Data
16
OUT
UART1_RTS*
Request To Send
17
OUT
UART1_DTR*
Data Terminal Ready
18
IN
UART1_CTS*
Clear To Send
19
IN
UART1_DSR*
Data Set Ready
20
IN
UART1_DCD*
Data Carrier Detect
21
IN
UART1_RI*
Ring Indicate
22
OUT
nTXD
Debug UART Txd
23
GND
USB GND
24
IN/OUT
VP
USB + Pin
25
IN/OUT
VM
USB - Pin
26
VDD
USB VDD
27
IN
UART4_RI*
Ring Indicate
28
OUT
SCL*
Serial EEPROM clock. Connect to EEPROM/SCL
29
GND
GND
30
IN
VCO_IN
PLL VCO In
31
OUT
CP_OUT
PLL VCO Out
32
VDD
VDD
33
IN
PLLEN*
PLL Enable
34
IN
nRXD*
Debug UART Rxd
35
N/C
no connection
36
N/C
no connection
37
OUT
UART2_Txd*
Transmit Data
38
IN
UART2_Rxd*
Receive Data
39
OUT
UART2_RTS*
Request To Send
40
OUT
UART2_DTR*
Data Terminal Ready
41
IN
UART2_CTS*
Clear To Send
42
IN
UART2_DSR*
Data Set Ready
43
IN
UART2_DCD*
Data Carrier Detect
44
IN
UART2_RI*
Ring Indicate
45
OUT
UART3_Txd*
Transmit Data
KL5KUSB105
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
4
Ver. 1.8
USB to 4 Serial Ports
Pin #
LQFP
I/O
Pin Name
Description
46
GND
GND
47
IN
CLK
12MHz Clock/Crystal Input
48
OUT
X2
12MHz Crystal Output
49
OUT
XA_15
External Address Pin
50
VDD
VDD
51
VDD
VDD
52
OUT
XA_14
External Address Pin
53
OUT
XA_0
External Address Pin
54
OUT
nXBHE
External byte High Enable (Active low)
55
GND
GND
56
OUT
nXRAMSEL
External RAM CS (Active low)
57
IN
UART3_Rxd*
Receive Data
58
OUT
UART3_RTS*
Request To Send
59
OUT
UART3_DTR*
Data Terminal Ready
60
IN
UART3_CTS*
Clear To Send
61
IN
UART3_DSR*
Data Set Ready
62
IN
UART3_DCD*
Data Carrier Detect
63
OUT
nXRD
External Memory Read (Active low)
64
OUT
nXWR
External Memory Write (Active low)
65
OUT
nXROMSEL
External ROM CS (Active low)
66
IN
nNRESET
Reset Pin
67
IN
nNTST*
Test Pin, Disconnect for Normal Operation
68
GND
GND
69
OUT
XA_1
External Address Pin
70
OUT
XA_2
External Address Pin
71
OUT
XA_3
External Address Pin
72
OUT
XA_4
External Address Pin
73
OUT
XA_5
External Address Pin
74
OUT
XA_6
External Address Pin
75
OUT
XA_7
External Address Pin
76
OUT
XA_8
External Address Pin
77
OUT
XA_9
External Address Pin
78
OUT
XA_10
External Address Pin
79
OUT
XA_11
External Address Pin
80
OUT
XA_12
External Address Pin
81
OUT
XA_13
External Address Pin
82
GND
GND
83
IN/OUT
XD_0*
External Data Pins
84
IN/OUT
XD_1*
External Data Pins
85
IN/OUT
XD_2*
External Data Pins
86
IN/OUT
XD_3*
External Data Pins
87
IN/OUT
XD_4*
External Data Pins
88
IN/OUT
XD_5*
External Data Pins
89
IN/OUT
XD_6*
External Data Pins
90
IN/OUT
XD_7*
External Data Pins
91
IN/OUT
XD_8*
External Data Pins
92
IN/OUT
XD_9*
External Data Pins
93
IN/OUT
XD_10*
External Data Pins
94
IN/OUT
XD_11*
External Data Pins
KL5KUSB105
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
5
Ver. 1.8
USB to 4 Serial Ports
Pin #
LQFP
I/O
Pin Name
Description
95
IN/OUT
XD_12*
External Data Pins
96
IN/OUT
XD_13*
External Data Pins
97
GND
GND
98
IN/OUT
XD_14*
External Data Pins
99
IN/OUT
XD_15*
External Data Pins
100
VDD
VDD
*Pins are 5V tolerant.
Function Description
16 Bit Processor
The integrated 16 bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system. The masked ROM in the this device or
external memory contains a specialized instruction set that has been designed for highly efficient
coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
Buffer, external memory, I/O interfaces, and all the control and status registers
The processor supports prioritized vectored hardware interrupts and has as many as 240
software interrupt vectors.
The processor provides six addressing modes, supporting memory-to-memory, memory-to-
register, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions.
All instructions are sixteen bits wide, although some instructions require operands, which may
occupy another one or two words. Several special " short immediate" instructions are available,
so that certain frequently used operations with small constant operand will fit into a 16-bit
instruction.
The Processor Divide/Multiply function
The processor's divide/multiply function contains all the instructions of the base processor that
additionally includes integer divide and multiply instructions. A signed multiply instructions takes
two 16-bit operands and returns a 32-bit result. A signed divide instruction divides a 32-bit
operand by a 16-bit operand.
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