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Datasheet: KL5KUSB101 (Kawasaki Microelectronics)

Usb to Ethernet Controller

 

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KL5KUSB101
USB to Ethernet Controller
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
1
Ver. 2.4
General Description
The Kawasaki KL5KUSB101 Controller is a unique single chip solution to interface peripheral
devices to the Universal Serial Bus (USB) and Ethernet. The KL5KUSB101 has been specifically
designed to provide a simple solution to communicate with Ethernet applications as well as other
USB peripheral devices. This has been accomplished by its highly integrated functionality. The
USB controller consists of a central 16-bit processor, mask ROM, RAM buffer, clock generator,
Ethernet interface, UART, IRQ, Watchdog Timer, Serial interface, External Memory Interface and
SPORT Interface. The SIE (Serial Interface Engine) is fully compatible with the USB specification.
This USB to Ethernet controller is ideal for LAN (Local Area Network), HAN (Home Area
Network), Cable Modem, Set Top Boxes, or Mobile Networking applications.
Features
Advanced 16 Bit processor for USB transaction
processing and control data processing
USB interface ver. 1.0/1.1 compliant
Transceivers and SIE (Serial Interface Engine)
Internal Clock Generation
Utilizes low cost external crystal circuitry
1.5K x 16 Internal RAM buffer
Serial Interface for external EEPROM
Watchdog timer
Fully IEEE 802.3 compliant 10 Mbit/sec
Ethernet MAC Layer. Interfaces serially of
an external ENDEC PHY.
UART
External memory interface
100 pin QFP and LQFP package
Block Diagram
RAM
(3KB)
Timer 0
USB Interface
16 Bit Address / Data Bus
Data -
Data +
Serial
Interface
Engine
Mask ROM
(8KB)
Timer 1
Watchdog
Timer
16 Bit
Processor
UART
Txd
Rxd
10Mb/s
Ethernet
Interface
8
EEPROM
Serial Interface
DIO
CK
SRAM Interface
A15-0
D15-0
Cntrl.
X2
X1
Clock
Generator
IRQ
INT 1-0
2
KL5KUSB101
USB to Ethernet Controller
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
2
Ver. 2.4
KL5KUSB101 Application Block Diagram
Pin Diagram 100QFP
Optional
External
Memory
Serial
EEPROM
KL5KUSB101
USB /
Ethernet
PHY
Transformer
USB
Full duplex
10 Base T
Ethernet
XD_15
VDD
VDD
GND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
VDD
GND
PHTXD0
PHCOL
PHTXEN
PHRXER
PHRXDV
PHTXER
PHLPBK
PHUTP
TXD
UGND
VP
VM
UVDD
N/C
N/C
PHTCLK
PHRXCLK
PHCRS
PH_RXD0
X_PCLK
RXD
IRQ1 IRQ2
N/C N/C N/C N/C SDA SCL N/C N/C N/C
OGND
CLK
X2
XA_10
XA_9
XA_8
XA_7
XA_6
XA_5
XA_4
XA_3
XA_2
XA_1
nTST
nRESET
nXROMSEL
nXWR
nXRD
GND
nPDN
N/C
N/C
N/C
N/C
LED_ON
nXRAMSEL
IGND
nXBHE
A0
XA_14
OVDD
VDD
XA_15
XD_14
OGND XD_13
XD_12 IGND
XD_11 XD_10
XD_9 XD_8
XD_7 XD_6
XD_5 XD_4
XD_3 XD_2
XD_1 XD_0
XA_13 XA_12
XA_11
KL5KUSB101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100
99 98
97 96
95 94
93 92
91 90
89 88
87 86
85 84
83 82
81
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
KL5KUSB101
USB to Ethernet Controller
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
3
Ver. 2.4
Pin Diagram 100LQFP
Pin Description
Pin #
QFP
Pin #
LQFP
I/O
Pin Name
Description
1
99
IN/OUT
XD_15
External Data Pins
2
100
IN
VDD
VDD
3
1
IN
VDD
VDD
4
2
GND
AGND
GND
5
3
N/C
N/C
Open connection
6
4
N/C
N/C
Open connection
7
5
N/C
N/C
Open connection
8
6
N/C
N/C
Open connection
9
7
N/C
N/C
Open connection
10
8
N/C
N/C
Open connection
11
9
N/C
N/C
Open connection
12
10
N/C
N/C
Open connection
13
11
N/C
N/C
Open connection
14
12
IN
VDD
VDD
VDD
GND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
VDD
GND
PHTXD0
PHCOL
PHTXEN
PHRXER
PHRXDV
PHTXER
PHLPBK
PHUTP
TXD
UGND
VP
VM
UVDD
N/C
N/C
PHTCLK
PHRXCLK
PHCRS
PH_RXD0
X_PCLK
RXD IRQ1 IRQ2 N/C N/C N/C N/C SDA SCL N/C N/C N/C
OGND
CLK
X2
XA_15
VDD
XA_7
XA_6
XA_5
XA_4
XA_3
XA_2
XA_1
nTST
nRESET
nXROMSEL
nXWR
nXRD
GND
nPDN
N/C
N/C
N/C
N/C
LED_ON
nXRAMSEL
IGND
nXBHE
A0
XA_14
OVDD
VDD
XD_15 XD_14
OGND XD_13
XD_12 IGND
XD_11 XD_10
XD_9 XD_8
XD_7 XD_6
XD_5 XD_4
XD_3 XD_2
XD_1 XD_0
XA_13 XA_12
XA_11 XA_10
XA_9 XA_8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100
99 98
97 96
95 94
93 92
91 90
89 88
87 86
85 84
83 82
81 80
79 78
77 76
26 27
28 29
30 31
32 33
34 35
36 37
38 39
40 41
42 43
44 45
46 47
48 49
50
KL5KUSB101_L
KL5KUSB101
USB to Ethernet Controller
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
4
Ver. 2.4
Pin #
QFP
Pin #
LQFP
I/O
Pin Name
Description
15
13
IN
GND
GND
16
14
OUT
PHTXD0
Transmit data to PHY
17
15
IN
PHCOL
Collision input from PHY
18
16
OUT
PHTXEN
Transmit Enable to PHY
19
17
IN
PHRXER
Receive Data Error from PHY
20
18
IN
PHRXDV
Receive Data Valid from PHY
21
19
OUT
PHTXER
Transmit Data Error to PHY
22
20
OUT
PHLPBK
Loopback input to PHY
23
21
OUT
PHUTP
UTP/STP input to PHY
24
22
IN/OUT
TXD
UART TXD
25
23
IN
UGND
USB GND
26
24
IN/OUT
VP
USB + Pin
27
25
IN/OUT
VM
USB Pin
28
26
IN
UVDD
USB VDD
29
27
NC
NC
NC
30
28
NC
NC
NC
31
29
IN
PHTXCLK
PHY Transmit Clock
32
30
IN
PHRXCLK
PHY Receive Clock
33
31
IN
PHCRS
PHY Carrier Sense
34
32
IN
PH_RXD0
PHY Serial Receive Data
35
33
IN/OUT
X_PCLK
External PCLK
36
34
IN/OUT
RXD
UART RXD
37
35
IN
IRQ1
Edge sens. Interrupt
38
36
IN
IRQ2
Edge sens. Interrupt
39
37
NC
NC
Open connection
40
38
NC
NC
Open connection
41
39
NC
NC
Open connection
42
40
NC
NC
Open connection
43
41
OUT
SDA
SDA / EEPROM Serial Data
44
42
OUT
SCL
SCL / EEPROM Serial Clock
45
43
IN
PU#1
Pull up to USB + Pin for High Speed
46
44
NC
NC
Open connection
47
45
NC
NC
Open connection
48
46
IN
OGND
GND
49
47
IN
CLK
48MHz Clock/Crystal Input
50
48
OUT
X2
48MHz Crystal Output
51
49
OUT
XA_15
External Address Pin
52
50
IN
VDD
VDD
53
51
IN
OVDD
VDD
54
52
OUT
XA_14
External Address Pin
55
53
OUT
XA0
External Address Pin
56
54
OUT
nXBHE
External byte High Enable (Active low)
57
55
IN
IGND
GND
58
56
OUT
nXRAMSEL
External RAM CS (Active low)
59
57
OUT
LED_ON
Turns on 3.3V to TX LED
60
58
N/C
N/C
Open connection
61
59
N/C
N/C
Open connection
62
60
N/C
N/C
Open connection
63
61
N/C
N/C
Open connection
64
62
OUT
nPDN
Active low Powerdown mode signal to Phy
KL5KUSB101
USB to Ethernet Controller
Kawasaki LSI
2570 North First Street
Suite 301
San Jose, CA 95131
Tel: (408) 570-0555
Fax: (408) 570-0567
www.klsi.com
5
Ver. 2.4
Pin #
QFP
Pin #
LQFP
I/O
Pin Name
Description
65
63
IN
GND
GND
66
64
OUT
nXRD
External Memory Read (Active low)
67
65
OUT
nXWR
External Memory Write (Active low)
68
66
N/C
nXROMSEL
External ROM CS, active LO
69
67
IN
nRESET
Reset Pin
70
68
IN
nTST
Test Pin, Disconnect for Normal Operation
71
69
OUT
XA_1
External Address Pins
72
70
OUT
XA_2
External Address Pins
73
71
OUT
XA_3
External Address Pins
74
72
OUT
XA_4
External Address Pins
75
73
OUT
XA_5
External Address Pins
76
74
OUT
XA_6
External Address Pins
77
75
OUT
XA_7
External Address Pins
78
76
OUT
XA_8
External Address Pins
79
77
OUT
XA_9
External Address Pins
80
78
OUT
XA_10
External Address Pins
81
79
OUT
XA_11
External Address Pins
82
80
OUT
XA_12
External Address Pins
83
81
OUT
XA_13
External Address Pins
84
82
IN/OUT
XD_0
External Data Pins
85
83
IN/OUT
XD_1
External Data Pins
86
84
IN/OUT
XD_2
External Data Pins
87
85
IN/OUT
XD_3
External Data Pins
88
86
IN/OUT
XD_4
External Data Pins
89
87
IN/OUT
XD_5
External Data Pins
90
88
IN/OUT
XD_6
External Data Pins
91
89
IN/OUT
XD_7
External Data Pins
92
90
IN/OUT
XD_8
External Data Pins
93
91
IN/OUT
XD_9
External Data Pins
94
92
IN/OUT
XD_10
External Data Pins
95
93
IN/OUT
XD_11
External Data Pins
96
94
IN
IGND
GND
97
95
IN/OUT
XD_12
External Data Pins
98
96
IN/OUT
XD_13
External Data Pins
99
97
IN
OGND
GND
100
98
IN/OUT
XD_14
External Data Pins
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