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Datasheet: 5962-89636012A (Intersil Corporation)

Low Noise, High Performance Operational Amplifier

 

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Intersil Corporation
1
HA-5101/883
Low Noise, High Performance Operational
Amplifier
The HA-5101/883 is a dielectrically isolated operational
amplifier featuring low noise and high performance. This
amplifier has an excellent noise voltage density of
4.5nV/
Hz (max) at 1kHz. The unity gain stable
HA-5101/883 yields a 10MHz unity gain bandwidth and a
6V/s slew rate.
DC characteristics of the HA-5101/883 assure accurate
performance. The 3mV (max) offset voltage is externally
adjustable and offset voltage drift is just 3
V/C. Low bias
currents (200nA max) reduce input current errors and the
high open loop voltage gain of 100kV/V, over temperature,
increases the loop gain for low distortion amplification.
The HA-5101/883 is ideal for audio applications, especially
low-level signal amplifiers such as microphone, tape head
and preamplifiers. Additionally, it is well suited for low
distortion oscillators, low noise function generators and high
Q filters.
Features
This Circuit is Processed in Accordance to MIL-STD-883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Low Noise Voltage @ 1kHz . . . . . . . . . . . 4.5nV/
Hz Max
Low Noise Current @ 1kHz . . . . . . . . . . . . . 3pA/
Hz Max
Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . 10MHz Min
High Gain (Full Temp) . . . . . . . . . . . . . . . . . .100kV/V Min
(Room Temp) . . . . . . . . . . . . . . . . . 1MV/V Typ
Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V/
s Min
High CMRR/PSRR (Full Temp) . . . . . . . . . . . . . 80dB Min
High Output Drive Capability (Full Temp) . . . . . . . . . 25mA
Applications
High Quality Audio Preamplifiers
High Q Active Filters
Low Noise Function Generators
Low Distortion Oscillators
Low Noise Comparators
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (C)
PACKAGE
PKG.
DWG. #
HA7-5101/883
-55 to 125
8 Ld CerDIP
F8.3A
5962-89636012A
-55 to 125
20 Ld Ceramic LCC J20.A
HA7-5101/883 (CERDIP)
TOP VIEW
5962-896360 (CLCC)
TOP VIEW
BAL
-IN
+IN
V-
2
3
4
1
V+
OUT
7
6
5
8
NC
BAL
+
-
NC
-IN
NC
+IN
NC
NC
BAL
NC
NC
NC
NC
V-
NC
BAL
NC
NC
V+
NC
OUT
NC
4
5
6
7
8
10
11
12
13
9
3
2
1
20
19
16
17
18
15
14
-
+
Data Sheet
August 17, 2005
FN3931.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1994, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
FN3931.1
August 17, 2005
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . V+ to V-
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Output Short Circuit Duration. . . . . . . . . . . . . . . . . . . . . . . Indefinite
Junction Temperature (T
J
). . . . . . . . . . . . . . . . . . . . . . . . . . . +175C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<2000V
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300C
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . -55C to +125C
Operating Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . 5V to 15V
V
INcm
1/2 (V+ - V-)
R
L
500
Thermal Resistance
JA
(C/W)
JC
(C/W)
Ceramic DIP Package . . . . . . . . . . . . .
120
30
Ceramic LCC Package. . . . . . . . . . . . .
86
26
Package Power Dissipation Limit at +75C for T
J
+175C
Ceramic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.22W
Ceramic LCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.35W
Package Power Dissipation Derating Factor Above +75C
Ceramic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . .12.2mW/C
Ceramic LCC Package. . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. D.C. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V
S
=
15V, R
S
= 100
, R
L
= 500k
, V
OUT
= 0V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
GROUP A
SUBGROUP TEMP (C)
LIMITS
UNITS
MIN
MAX
Input Offset Voltage
V
IO
V
CM
= 0V
1
+25
-3
3
mV
2, 3
+125, -55
-4
4
mV
Input Bias Current
+I
B
V
CM
= 0V
+R
S
= 100k
-RS = 100
1
+25
-200
200
nA
2, 3
+125, -55
-325
325
nA
-I
B
V
CM
= 0V
+R
S
= 100
-RS = 100k
1
+25
-200
200
nA
2, 3
+125, -55
-325
325
nA
Input Offset Current
I
IO
V
CM
= 0V
+R
S
= 100k
-RS = 100k
1
+25
-75
75
nA
2, 3
+125, -55
-125
125
nA
Common Mode Range
+CMR
V+ = 3V
V- = -27V
1
+25
12
-
V
2, 3
+125, -55
12
-
V
-CMR
V+ = 27V
V- = -3V
1
+25
-
-12
V
2, 3
+125, -55
-
-12
V
Large Signal Voltage Gain
+A
VOL
V
OUT
= 0V and
+10V
R
L
= 2k
4
+25
100
-
kV/V
5, 6
+125, -55
100
-
kV/V
-A
VOL
V
OUT
= 0V and
-10V
R
L
= 2k
4
+25
100
-
kV/V
5, 6
+125, -55
100
-
kV/V
Common Mode Rejection Ratio
+CMRR
V
CM
= +10V
V+ =+5V
V- = -25V
V
OUT
= -10V
1
+25
80
-
dB
2, 3
+125, -55
80
-
dB
-CMRR
V
CM
= -10V
V+ = +25V
V- = -5V
V
OUT
= +10V
1
+25
80
-
dB
2, 3
+125, -55
80
-
dB
HA-5101/883
3
FN3931.1
August 17, 2005
Output Voltage Swing
+V
OUT1
R
L
= 2k
1
+25
12
-
V
2, 3
+125, -55
12
-
V
-V
OUT1
R
L
= 2k
1
+25
-
-12
V
2, 3
+125, -55
-
-12
V
+V
OUT2
V
S
=
18V
R
L
= 600
1
+25
15
-
V
2, 3
+125, -55
15
-
V
-V
OUT2
V
S
=
18V
R
L
= 600
1
+25
-
-15
V
2, 3
+125, -55
-
-15
V
Output Current
+I
OUT
V
OUT
= -15V
V
S
= 18V
1
+25
25
-
mA
2, 3
+125, -55
25
-
mA
-I
OUT
V
OUT
= +15V
V
S
= 18V
1
+25
-
-25
mA
2, 3
+125, -55
-
-25
mA
Quiescent Power Supply Current
+I
CC
V
OUT
= 0V
I
OUT
= 0mA
1
+25
-
6
mA
2, 3
+125, -55
-
6
mA
-I
CC
V
OUT
= 0V
I
OUT
= 0mA
1
+25
-6
-
mA
2, 3
+125, -55
-6
-
mA
Power Supply Rejection Ratio
+PSRR
V
S
= 10V
V+ = +10V, V- = -15V
V+ = +20V, V- = -15V
1
+25
80
-
dB
2, 3
+125, -55
80
-
dB
-PSRR
V
S
= 10V
V+ = +15V, V- = -10V
V+ = +15V, V- = -20V
1
+25
80
-
dB
2, 3
+125, -55
80
-
dB
Offset Voltage Adjustment
+V
IO
Adj
Note 4
R
L
= 2k
, C
L
= 50pF
A
V
= +1V/V
1
+25
V
IO
-1
-
mV
2, 3
+125, -55
V
IO
-1
-
mV
-V
IO
Adj
1
+25
V
IO
+1
-
mV
2, 3
+125, -55
V
IO
+1
-
mV
TABLE 1. D.C. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: V
S
=
15V, R
S
= 100
, R
L
= 500k
, V
OUT
= 0V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
GROUP A
SUBGROUP TEMP (C)
LIMITS
UNITS
MIN
MAX
TABLE 2. A.C. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V
S
=
15V, R
S
= 50
, R
L
= 2k
, C
L
= 50pF, A
VCL
= +1V/V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
GROUP A
SUBGROUP TEMP (C)
LIMITS
UNITS
MIN
MAX
Slew Rate
+SR
V
OUT
= -3V to +3V
4
+25
6
-
V/
s
-SR
V
OUT
= +3V to -3V
4
+25
6
-
V/
s
Rise and Fall Time
t
R
V
OUT
= 0V to +200mV
10%
t
R
90%
4
+25
-
200
ns
5, 6
+125, -55
-
400
ns
t
F
V
OUT
= 0V to -200mV
10%
t
F
90%
4
+25
-
200
ns
5, 6
+125, -55
-
400
ns
Overshoot
+OS
V
OUT
= 0V to +200mV
4
+25
-
35
%
5, 6
+125, -55
-
35
%
-OS
V
OUT
= 0V to -200mV
4
+25
-
35
%
5, 6
+125, -55
-
35
%
HA-5101/883
4
FN3931.1
August 17, 2005
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: V
S
=
15V, R
L
= 2k
, C
L
= 50pF, A
V
= +1, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
NOTES
TEMP (C)
LIMITS
UNITS
MIN
MAX
Differential Input Resistance
R
IN
V
CM
= 0V
1
+25
250
-
k
Low Frequency Peak-to-Peak Noise
E
nP-P
0.1Hz to 10Hz
1
+25
-
0.2
V
P-P
Input Noise Voltage Density
E
n
R
S
= 20
, f
o
= 1000Hz
1
+25
-
4.5
nV/
Hz
Input Noise Current Density
I
n
R
S
= 2M
, f
o
= 1000Hz
1
+25
-
3
pA/
Hz
Unity Gain Bandwidth
UGBW
V
O
= 100mV
1
+25
10
-
MHz
Full Power Bandwidth
FPBW
V
PEAK
= 10V
1, 2
+25
95
-
kHz
Minimum Closed Loop Stable Gain
CLSG
1
-55 to +125
+1
-
V/V
Output Resistance
R
OUT
Open Loop
1
+25
-
150
Quiescent Power Consumption
PC
V
OUT
= 0V, I
OUT
= 0mA
1, 3
-55 to +125
-
180
mW
NOTES:
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters
are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon
data from multiple production runs which reflect lot to lot and within lot variation.
2. Full Power Bandwidth guarantee based on Slew Rate measurement using FPBW = Slew Rate/(2
V
PEAK
).
3. Quiescent Power Consumption based upon Quiescent Supply Current test maximum. (No load on outputs.)
4. Offset adjustment range is [V
IO (Measured)
1mV] minimum referred to output. This test is for functionality only to assure adjustment through 0V.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
SUBGROUPS (SEE TABLES 1 & 2)
Interim Electrical Parameters (Pre Burn-in)
1
Final Electrical Test Parameters
1*, 2, 3, 4, 5, 6
Group A Test Requirements
1, 2, 3, 4, 5, 6
Groups C & D Endpoints
1
*PDA applies to Subgroup 1 only.
HA-5101/883
5
FN3931.1
August 17, 2005
t
R
t
F
t
F
t
R
HA-5101/883
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