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Datasheet: ILC5062M-46 (Impala Linear Corporation)

ST-23 POWER SUPPLY RESET MONITOR WITH COMPLEMENTARY CMOS OUTPUT

 

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Impala Linear Corporation
ILC5062
SOT-23 Power Supply reset Monitor
With Complementary CMOS Output
Impala Linear Corporation
Impala Linear Corporation
1
(408) 574-3939
www.impalalinear.com
June 1999
ILC5062 1.3
All-CMOS voltage monitoring circuit in a 3-lead SOT-23
package offers the best performance in power consumption
and accuracy.
The ILC5062 is available in a series of 1% (A-grade) or 2%
(standard grade) accurate trip voltages to fit most micro-
processor applications. Even though its output can sink
over 2mA, the device draws only 1A in normal operation.
Additionally, a built-in hysteresis of 5% of detect voltage
simplifies system design.
All-CMOS design in SOT-23 package
A grade 1% precision in Reset Detection
Standard grade : 2% precision in Reset Detection
Only 1A of Iq
Over 2mA of sink current capability
Built-in hysteresis of 5% of detection voltage
Voltage options of 2.6, 2.7, 2.8, 2.9, 3.1, 4.4, and 4.6V fit
most supervisory applications
Microprocessor reset circuits
Memory battery back-up circuitry
Power-on reset circuits
Portable and battery powered electronics
1
3
V
OUT
V
SS
SOT-23
(TOP VIEW)
2
V
IN
V
REF
V
IN
V
SS
V
OUT
Complementary CMOS Output
Ordering Information
ILC5062AM-26
ILC5062AM-27
ILC5062AM-28
ILC5062AM-29
ILC5062AM-31
ILC5062AM-44
ILC5062AM-46
ILC5062M-26
ILC5062M-27
ILC5062M-28
ILC5062M-29
ILC5062M-31
ILC5062M-44
ILC5062M-46
2.6V1% Monitor in SOT-23
2.7V1% Monitor in SOT-23
2.8V1% Monitor in SOT-23
2.9V1% Monitor in SOT-23
3.1V1% Monitor in SOT-23
4.4V1% Monitor in SOT-23
4.6V1% Monitor in SOT-23
2.6V2% Monitor in SOT-23
2.7V2% Monitor in SOT-23
2.8V2% Monitor in SOT-23
2.9V2% Monitor in SOT-23
3.1V2% Monitor in SOT-23
4.4V2% Monitor in SOT-23
4.6V2% Monitor in SOT-23
* Standard product offering comes in tape & reel,
quantity 3000 per reel, orentation right
General Description
Features
Applications
Block Diagram
Pin-Package Configurations
Conditions
A grade
Standard grade
V
IN
= 1.5V
V
IN
= 2.0V
V
IN
= 3.0V
V
IN
= 4.0V
V
IN
= 5.0V
V
DF
= 2.1 ~ 6.0V
N-ch V
DS
= 0.5V
V
IN
= 1.0V
V
IN
= 2.0V
V
IN
= 3.0V
V
IN
= 4.0V
V
IN
= 5.0V
P-Ch V
DS
= 2.1V
V
IN
= 8V
-30C
<
T
opr
< 80C
Typ
V
DF
V
DF
V
DF
X 0.05
0.9
1.0
1.3
1.6
2.0
2.2
7.7
10.1
11.5
13.0
-10
100
Units
V
V
V
A
V
mA
ppm/C
ms
Max
V
DF
X 1.01
V
DF
X 1.02
V
DF
X 0.08
2.6
3.0
3.4
3.8
4.2
10.0
0.2
Parameter
Input Voltage
Output Current
Output Voltage
Continuous Total
Power Dissipation (SOT-23)
Operating Ambient Temperature
Storage Temperature
Symbol
V
IN
I
OUT
V
OUT
P
d
T
opr
T
stg
Ratings
12
50
V
SS
-0.3~V
IN
=+0.3
150
-30~+80
-40~+125
Units
V
mA
V
mW
C
C
Absolute Maximum Ratings (T
A
=25C)
Parameter
Detect Fail Voltage
Detect Fail Voltage
Hysteresis Range
Supply Current
Operating Voltage
Output Current
Temperature Characteristics
Delay Time (Release
Voltage Output Inversion)
Symbol
V
DF
V
DF
V
HYS
I
SS
V
IN
I
OUT
V
DF
/(
T
opr
V
DF
)
t
DLY
(V
DR
V
OUT
Inversion)
Min
V
DF
X 0.99
V
DF
X 0.98
V
DF
X 0.02
1.5
Note: An additional resistor between the V
IN
pin and supply voltage may cause deterioration of the characteristics due to increasing of V
DR
.
SOT-23 Power Supply reset Monitor With Complementary CMOS Output
Impala Linear Corporation
2
(408) 574-3939
www.impalalinear.com
June 1999
ILC5062 1.3
Electrical Characterisitcs ILC5062 (T
A
=25C)
The following designators 1~6 refer to the timing diagram below.
1. While the input voltage (V
IN
) is higher than the detect
voltage (V
DF
), the output voltage at V
OUT
pin equals the
input voltage at V
IN
pin.
2. When the input V
IN
voltage falls lower than V
DF
, V
OUT
drops near ground voltage.
3. If the input voltage decreases below the minimum operat-
ing voltage (V
MIN
), the V
OUT
output voltage will be undefined.
4. During an increase of the input voltage from the V
SS
voltage, V
OUT
is undefined at the voltage below V
MIN
.
Exceeding the V
MIN
level, the ouput stays at the ground
level (V
SS
) between the minimum operating voltage (V
MIN
)
and the detect release voltage (V
DR
).
5. If the input voltage increases more than V
DR
, the output
voltage at V
OUT
pin equals the input voltage at V
IN
pin.
6. The difference between V
DR
and V
DF
is the hysteresis
in the system.
6
5
4
3
1
2
INPUT VOLTAGE (V
IN
)
DETECT RELEASE VOLTAGE (V
DR
)
DETECT FAIL VOLTAGE (V
DF
)
MINIMUM OPERATING VOLTAGE (V
MIN
)
GROUND VOLTAGE (V
SS
)
OUTPUT VOLTAGE (V
OUT
)
GROUND VOLTAGE (V
SS
)
SOT-23 Power Supply reset Monitor With Complementary CMOS Output
Impala Linear Corporation
3
(408) 574-3939
www.impalalinear.com
June 1999
ILC5062 1.3
Functional Description
Timing Diagram
SOT-23 Power Supply reset Monitor With Complementary CMOS Output
Impala Linear Corporation
4
(408) 574-3939
www.impalalinear.com
June 1999
ILC5062 1.3
Typical Performance Characteristics - general conditions for all curves.
SOT-23 Power Supply reset Monitor With Complementary CMOS Output
Impala Linear Corporation
5
(408) 574-3939
www.impalalinear.com
June 1999
ILC5062 1.3
Typical Performance Characteristics - general conditions for all curves.
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