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Datasheet: GLT441L04E-60J3 (G-Link Technology Corp.)

 

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G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 1 -
Features :
Description :
1,048,576 words by 4 bits organization.
Fast access time and cycle time
Low power dissipation.
Read-Modify-Write,
RAS
-Only Refresh,
CAS
-Before-
RAS
Refresh, Hidden Refresh.
1,024 refresh cycles per 16ms.
Available in 300 mil 26(20) TSOPII,300mil
26(20) SOJ.
3.3V
0.3V Vcc Power Supply voltage
.
All inputs and Outputs are LVTTL
compatible.
FAST
PAGE access cycle.
Self-refresh Capability
.
The GLT441L04 is a high-performance
CMOS dynamic random access memory
containing 4,194,304 bits organized in a x4
configuration. The GLT4161L04 has 10 row
and 10 column-addresses, and accepts
1024-cycle refresh in 16 ms.
The GLT441L04 provides FAST PAGE
MODE operation which allows for fast data
access within a row-address defined
boundary, up to 1024 x 4 bits with cycle
times as short as 35ns.
HIGH PERFORMANCE
50
60
70
Max.
RAS
Access Time, (t
RAC
)
50 ns
60 ns
70 ns
Max. Column Address Access Time, (t
AA
)
25 ns
30 ns
35 ns
Min. Extended Data Out Page Mode Cycle Time, (t
PC
)
35 ns
40 ns
45 ns
Min. Read/Write Cycle Time, (t
RC
)
90 ns
110 ns
130 ns
Max.
CAS
Access Time (t
CAC
)
13 ns
15 ns
20 ns
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 2 -
Pin Configuration :
DQ
0
A
0
A
1
A
2
A
3
1
2
3
4
5
6
8
9
10
15
14
13
12
11
18
17
16
A
8
A
7
V
SS
DQ
3
DQ
1
V
CC
DQ
2
A
6
A
5
19
20
CAS
OE
A
4
7
A
9
WE
RAS
DQ
0
A
0
A
1
A
2
A
3
1
2
3
4
5
6
8
9
10
15
14
13
12
11
18
17
16
A
8
A
7
V
SS
DQ
3
DQ
1
V
CC
DQ
2
A
6
A
5
19
20
CAS
OE
A
4
7
A
9
WE
RAS
Pin Descriptions:
Name
Function
A
0
A
9
Address Inputs
RAS
Row Address Strobe
CAS
Column Address Strobe
WE
Write Enable
OE
Output Enable
DQ
0
- DQ
3
Data Inputs / Outputs
V
CC
+3.3V Power Supply
V
SS
Ground
NC
No Connection
GLT441L04
300mil 26(20) TSOPII
GLT441L04
300mil 26(20) SOJ
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 3 -
Absolute Maximum Ratings*
Capacitance*
T
A
=25
C, V
CC
=3.3V
0.3V, V
SS
=0V
Operating Temperature, T
A
(ambient)
..............................................0
C to +70
C
Storage Temperature(plastic).........-55
C to +150
C
Voltage Relative to V
SS
.....................-0.5V to + 4.6V
Short Circuit Output Current............................20mA
Power Dissipation.............................................1.0W
Symbol
C
IN1
C
IN2
C
OUT
Parameter
Address Input
RAS, CAS, WE, OE
Data Input/Output
Max.
5
7
7
Unit
pF
pF
pF
*Note: Operation above Absolute Maximum Ratings can
aversely affect device reliability.
*Note: Capacitance is sampled and not 100% tested
Electrical Specifications
l
All voltages are referenced to GND.
l
After power up, wait more than 200
s and then, execute eight
CAS
-before-
RAS
or
RAS
-only
refresh cycles as dummy cycles to initialize internal circuit.
Block Diagram :
NO.2 CLOCK
GENERATOR
COLUMN-
ADDRESS
BUFFER
REFRESH
CONTROLLER
REFRESH
COUNTER
ROW
ADDRESS
BUFFERS
NO.1 CLOCK
GENERATOR
10
10
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
RAS
10
10
COLUMN
DECODER
DATA-OUT
BUFFER
DATA-IN
BUFFER
SENSE AMPLIFIERS
I/O GATING
1024 x 1024 x 4
MEMORY
ARRAY
1024
1024
4
4
4
4
WE
CAS
DQ
0
DQ
1
DQ
2
DQ
3
OE
V
DD
V
SS
ROW DECODER
1024
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 4 -
Truth Table:
Function
RAS
CAS
WE
OE
ADDRESS
DATA-IN/OUT
t
R
t
C
DQ1-DQ4
Standby
H
H
X
X
X
X
X
High-Z
READ
L
L
H
L
ROW
COL
Data-Out
EARLY WRITE
L
L
L
X
ROW
COL
Data-In
READ WRITE
L
L
H
L
L
H
ROW
COL
Data-Out,Data-In
FAST-PAGE-MODE
1st Cycle
L
H
L
H
L
ROW
COL
Data-Out
READ
2nd cycle
L
H
L
H
L
n/a
COL
Data-Out
FAST-PAGE-MODE
1st Cycle
L
H
L
L
X
ROW
COL
Data-In
EARLY-WRITE
2nd cycle
L
H
L
L
X
n/a
COL
Data-In
FAST-PAGE-MODE
1st Cycle
L
H
L
H
L
L
H
ROW
COL
Data-Out,Data-In
READ-WRITE
2nd cycle
L
H
L
H
L
L
H
n/a
COL
Data-Out,Data-In
RAS
-ONLY REFRESH
L
H
X
X
ROW
n/a
High-Z
HIDDEN REFRESH
READ
L
H
L
L
H
L
ROW
COL
Data-Out
WRITE
L
H
L
L
L
X
ROW
COL
Data-In
CBR REFRESH
H
L
L
H
X
X
X
High-Z
SELF REFRESH
H
L
L
H
X
X
X
High-Z
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 5 -
DC and Operating Characteristics (1-2)
T
A
= 0
C to 70
C, V
CC
=3.3V
0.3V, V
SS
=0V, unless otherwise specified.
Sym.
Parameter
Test Conditions
Access
Time
Min.
Typ
Max.
Unit Notes
I
LI
Input Leakage Current
(any input pin)
0V
V
IN
V
CC
+0.3V
(All other pins not under
test=0V)
-5
+5
A
I
LO
Output Leakage Current
(for High-Z State)
0V
V
out
V
CC
Output is disabled (Hiz)
-5
+5
A
I
CC1
Operating Current,
Random READ/WRITE
t
RC
= t
RC
(min.)
t
RAC
= 50ns
t
RAC
= 60ns
t
RAC
= 70ns
90
80
70
mA
1,2
I
CC2
Standby Current
RAS , CAS at V
IH
other inputs
V
SS
1
mA
I
CC3
Refresh Current,
RAS -Only
RAS cycling, CAS at V
IH
t
RC
= t
RC
(min.)
t
RAC
= 50ns
t
RAC
= 60ns
t
RAC
= 70ns
90
80
70
mA
2
I
CC4
Operating Current,
FAST Page Mode
RAS at V
IL
, CAS address
cycling:t
PC
=t
PC
(min.)
t
RAC
= 50ns
t
RAC
= 60ns
t
RAC
= 70ns
90
70
60
mA
1,2
I
CC5
Refresh Current,
CAS Before RAS
RAS , CAS address
cycling: t
RC
=t
RC
(min.)
t
RAC
= 50ns
t
RAC
= 60ns
t
RAC
= 70ns
90
80
70
mA
2
I
CC6
Standby Current, (CMOS)
RAS
V
CC
-0.2V,
CAS
V
CC
-0.2V,
All other inputs V
SS
300
A
I
CC7
Self refresh Current
RAS = CAS =0.2V,
WE = OE = A
0
~A
10
=V
CC
-
0.2V or 0.2V
DQ
0
~DQ
3
=V
CC
-0.2V,0.2V
or Open
300
A
V
IL
Input Low Voltage
-0.3
+0.8
V
3
V
IH
Input High Voltage
2.0
V
CC
+0.3
V
4
V
OL
Output Low Voltage
I
OL
= 2mA
0.4
V
V
OH
Output High Voltage
I
OH
= -2mA
2.4
V
Notes:
1. I
CC
is dependent on output loading when the device output is selected. Specified I
CC
(max.) is measured with the output
open.
2. I
CC
is dependent upon the number of address transitions specified ICC(max.) is measured with a maximum of one
transition per address cycle in random Read/Write and EDO Fast Page Mode.
3. Specified V
IL
(min.) is steady state operation. During transitions V
IL
(min.) may undershoot to 0.9V for a period not to
exceed 10ns. All AC parameters are measured with V
IL
(min.)
V
SS
and V
IH
(max.)
V
CC
.
4. Specified V
IH
(max.) is steady state operation . During transitions V
IH
(max.) may overshoot to V
CC
+0.9V for a period not
to exceed 10ns. All AC parameters are measured with V
IL
(min.)
V
SS
and VIH(max.)
V
CC
.
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 6 -
AC Characteristics
T
A
=0
C to 70
C , V
CC
= 3.3 V
0.3V, VIH/VIL = 3.0/0V, V
OH
/V
OL
= 2/0.8V
An initial pause of 200
s and 8
CAS
-before-
RAS
or
RAS
-only refresh cycles are required after power-up.
50
60
70
Parameter
Symbol
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Notes
Read or Write Cycle Time
t
RC
90
110
130
ns
Read Modify Write Cycle Time
t
RWC
133
155
185
ns
RAS Precharge Time
t
RP
30
40
50
ns
RAS Pulse Width
t
RAS
50
10k
60
10k
70
10k
ns
Access Time from RAS
t
RAC
50
60
70
ns
1,2,3
Access Time from CAS
t
CAC
13
15
20
ns
1,3,7
Access Time from Column Address
t
AA
25
30
35
ns
1,5,6
CAS to Output Low-Z
t
CLZ
0
0
0
ns
3
RAS Hold Time
t
RSH
13
15
20
ns
CAS Hold Time
t
CSH
50
60
70
ns
CAS Pulse Width
t
CAS
13
10k
15
10k
20
10k
ns
RAS to CAS Delay Time
t
RCD
20
37
20
45
20
50
ns
RAS to Column Address Delay Time
t
RAD
15
25
15
30
15
35
ns
7
CAS to RAS Precharge Time
t
CRP
5
5
5
ns
Row Address Set-Up Time
t
ASR
0
0
0
ns
Row Address Hold Time
t
RAH
10
10
10
ns
Column Address Set-Up Time
t
ASC
0
0
0
ns
Column Address Hold Time
t
CAH
10
10
15
ns
Column Address to RAS Lead Time
t
RAL
25
30
35
ns
Read Command Set-Up Time
t
RCS
0
0
0
ns
Read Command Hold Time Referenced
to CAS
t
RCH
0
0
0
ns
4
Read Command Hold Time Referenced
to RAS
t
RRH
0
0
0
ns
4
Write Command Set-Up Time
t
WCS
0
0
0
ns
8, 9
Write Command Hold Time
t
WCH
10
10
15
ns
Write Command Pulse Width
t
WP
10
10
15
ns
Write Command to RAS Lead Time
t
RWL
15
15
20
ns
Write Command to CAS Lead Time
t
CWL
13
15
20
ns
Data Set-Up Time
t
DS
0
0
0
ns
10
Data Hold Time
t
DH
10
10
15
ns
10
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 7 -
AC Characteristics
50
60
70
Parameter
Symbol
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Notes
RAS to WE Delay Time
t
RWD
73
85
100
ns
CAS to WE Delay Time
t
CWD
36
40
50
ns
Column Address to WE Delay Time
t
AWD
48
55
65
ns
CAS Precharge to WE Delay
t
CPWD
53
60
70
ns
RAS to CAS Precharge Time
t
RPC
5
5
5
ns
CAS precharge time ( CAS Before RAS
counter test cycle)
t
CPT
20
20
30
ns
Access Time from CAS Precharge
t
CPA
30
35
40
ns
Page Mode Cycle Time
t
PC
35
40
45
ns
Page Mode Read-Modify-Write Cycle Time
t
PRWC
76
85
100
ns
CAS Precharge Time (Page Mode)
t
CP
10
10
10
ns
RAS Pulse Width (Page Mode Only)
t
RASP
50
100k
60
200k
70
200k
ns
RAS Hold Time From CAS Precharge
t
RHCP
30
35
40
ns
Access Time from OE
t
OEA
13
15
20
ns
OE to Data Delay Time
t
OED
13
15
20
ns
OE to Output High-Z
t
OEZ
0
13
0
15
0
20
ns
OE Command Hold Time
t
OEH
13
15
20
ns
CAS
Set-Up Time for
CAS
-Before-
RAS
Cycle
t
CSR
5
5
5
ns
CAS
Hold Time for
CAS
-Before-
RAS
Cycle
t
CHR
10
10
15
ns
WE to RAS Precharge Time ( CAS
Before RAS Refresh )
t
WRP
10
10
10
ns
WE to RAS Hold Time ( CAS Before
RAS Refresh )
t
WRH
10
10
10
ns
Transition Time
t
T
3
50
3
50
3
50
ns
11
Refresh Period (1,024 cycles)
t
REF
16
16
16
ms
Refresh Period (S-Version)
t
REF
128
128
128
ms
RAS Pulse Width ( CAS Before RAS Self
Refresh )
t
RASS
100
100
100
s
RAS precharge Time ( CAS Before RAS
Self Refresh )
t
RPS
90
110
130
ns
CAS
Hold Time (
CAS
Before
RAS
Self Refresh )
t
CHS
50
50
50
ns
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 8 -
Notes:
1. Measure with a load equivalent to one TTL input and 100 pF.
2. Assumes that t
RCD
t
RCD
(max.). If t
RCD
is greater than t
RCD
(max.), access time will be t
AA
dominant.
3. Assumes that t
RAD
t
RAD
(max.). If t
RAD
is greater than t
RAD
(max.), access time will be
controlled by t
CAC
.
4. Either t
RRH
or t
RCH
must be satisfied for a Read Cycle.
5. Access time is determined by the longest of t
AA
, t
CAC
and t
CPA
.
6. Assumes that t
RAD
t
RAD
(max.).
7. Assumes that t
RCD
t
RCD
(max.).
8. t
WCS
, t
RWD
, t
AWD
and t
CWD
are not restrictive operating parameters.
9. t
WCS
(min.) must be satisfied in an Early Write Cycle.
10. t
DS
and t
DH
are referenced to the latter occurrence of
CAS
or
WE
.
11. t
T
is measured between V
IH
(min.) and V
IL
(max.). AC-measurements assume t
T
= 3 ns.
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 9 -
Read Cycle
ROW
ADDRESS
COLUMN
ADDRESS
DATA-OUT
t
RC
t
RAS
t
RP
t
CRP
t
CSH
t
RCD
t
RSH
t
CAS
t
CRP
t
ASR
t
RAH
t
RAD
t
ASC
t
CAH
t
RAL
t
RCH
t
RRH
t
AR
t
RCS
t
AA
t
OEA
t
OFF
t
OEZ
t
CAC
t
CLZ
t
RAC
Don't Care
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
OH-
V
OL-
DQ
OPEN
Early Write Cycle NOTE :
D
OUT
= Open
t
RP
t
RC
t
CRP
t
CSH
t
CRP
t
RCD
t
RSH
t
CAS
t
ASR
t
RAH
t
RAD
t
ASC
t
CAH
t
RAL
t
CWL
t
RWL
t
WCR
t
WCH
t
WP
t
WCS
t
AR
t
DS
t
DH
t
DHR
DATA - IN
COLUMN
ADDRESS
ROW
ADDRESS
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
IH-
V
IL-
DQ
Don't Care
t
RAS
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 10 -
Late Write Cycle ( OE Controlled Write)
NOTE : D
OUT
= Open
t
RP
t
RC
t
CRP
t
CSH
t
CRP
t
RCD
t
RSH
t
CAS
t
ASR
t
RAH
t
RAD
t
ASC
t
CAH
t
RAL
COLUMN
ADDRESS
ROW
ADDRESS
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
IH-
V
IL-
DQ
Don't Care
t
RAS
t
RCS
t
CWL
t
RWL
t
WP
t
DS
t
OED
t
OEH
t
DH
COLUMN
ADDRESS
Read - Modify - Write Cycle
t
RP
t
RC
t
CRP
t
CRP
t
RCD
t
RSH
VALID
DATA-OUT
COLUMN
ADDRESS
ROW
ADDR.
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
I/OH-
V
I/OL-
DQ
Don't Care
t
RAS
VALID
DATA-IN
t
CAS
t
ASR
t
RAH
t
RAD
t
ASC
t
CAH
t
CSH
t
AWD
t
CWD
t
RWL
t
CWL
t
WP
t
OEA
t
CLZ
t
CAC
t
AA
t
RAC
t
DH
t
DS
t
OED
t
OEZ
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 11 -
Fast Page Read Cycle
t
RASP
t
RP
t
CRP
t
RCD
t
CAS
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
t
CAS
t
CAS
t
CP
t
CP
t
PC
t
PC
t
RSH
t
ASR
t
RAD
t
RAH
t
ASC
t
CAH
t
CSH
t
ASC
t
ASC
t
CAH
t
CAH
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
DQ
V
IH-
V
IL-
ROW
ADDR.
COLUMN
ADDRESS
COLUMN
ADDRESS
COLUMN
ADDRESS
Don't Care
t
RCS
t
RCH
t
RCS
t
RCS
t
RCH
t
RRH
t
OEA
t
CAC
t
OEA
t
CAC
t
CLZ
t
RAC
t
AA
t
OEZ
t
OFF
t
AA
t
CLZ
t
OEZ
t
OEZ
t
OFF
t
OFF
t
CLZ
t
AA
VALID
DATA-UOT
VALID
DATA-UOT
VALID
DATA-UOT
Fast Page Write Cycle
NOTE : D
OUT
= Open
t
RASP
t
RP
t
CRP
t
RCD
t
CAS
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
t
CAS
t
CAS
t
CP
t
CP
t
PC
t
PC
t
RSH
t
ASR
t
RAD
t
RAH
t
ASC
t
CAH
t
CSH
t
ASC
t
ASC
t
CAH
t
CAH
t
WCS
t
WP
t
WCH
t
WCS
t
WCS
t
WCH
t
WCH
t
WP
t
WP
t
DS
t
DS
t
DS
t
DH
t
DS
t
DS
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
DQ
V
IH-
V
IL-
ROW
ADDR.
COLUMN
ADDRESS
COLUMN
ADDRESS
COLUMN
ADDRESS
VALID
DATA-IN
VALID
DATA-IN
VALID
DATA-IN
Don't Care
t
CWL
t
CWL
t
CWL
t
RWL
t
RHCP
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 12 -
Fast Page Mode Late Write Cycle
t
RASP
t
RP
t
CRP
t
RCD
t
CAS
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
t
CAS
t
CAS
t
CP
t
CP
t
PC
t
RSH
t
ASC
t
ASC
t
CAH
t
CAH
t
DS
t
DS
t
DH
t
DS
t
DH
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
DQ
V
IH-
V
IL-
ROW
ADDR.
COLUMN
ADDRESS
COLUMN
ADDRESS
COLUMN
ADDRESS
VALID
DATA-IN
Don't Care
t
CSH
t
RHCP
t
CRP
VALID
DATA-IN
VALID
DATA-IN
t
ASR
t
RAH
t
RAD
t
ASC
t
CAH
t
RAL
t
RCS
t
WP
t
WP
t
WP
t
CWL
t
CWL
t
CWL
t
RCS
t
RCS
t
RWL
t
OEH
t
OEH
t
OEH
t
OED
t
OED
t
DH
t
OED
Hi-Z
Hi-Z
Hi-Z
Fast Page Read - Modify - Write Cycle
t
RASP
t
RP
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
Don't Care
t
CSH
t
RCD
t
CAS
t
CP
t
CAS
t
RSH
t
CRP
t
RAD
t
RAH
t
ASR
t
ASC
t
CAH
t
ASC
t
CAH
t
RAL
t
PRWC
t
RCS
t
WP
t
CWL
t
WP
t
CWL
t
RWL
t
CWD
t
AWD
t
RWD
t
OEA
t
CWD
t
AWD
t
CPWD
t
OEA
t
OEH
t
RAC
t
AA
t
CAC
t
OEZ
t
OED
t
DS
t
DH
t
AA
t
CAC
t
OEZ
t
OED
t
DS
t
DH
t
CLZ
t
CLZ
VALID
DATA-OUT
VALID
DATA-IN
VALID
DATA-OUT
VALID
DATA-IN
ROW
ADDR.
COL.
ADDR.
COL.
ADDR.
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
I/OH-
V
I/OL-
DQ
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 13 -
CAS Before RAS Refresh Cycle
V
IH-
V
IL-
RAS
t
RAS
t
RAS
t
RP
t
RP
t
RC
t
RC
t
CSR
t
CSR
t
CHR
t
CHR
t
RPC
t
RPC
t
CRP
V
IH-
V
IL-
CAS
RAS -Only Refresh Cycle
V
IH-
V
IL-
RAS
t
RAS
t
RAS
t
RP
t
RP
t
RC
t
RC
t
RPC
t
CRP
V
IH-
V
IL-
CAS
t
CRP
t
ASR
t
ASR
t
RAH
t
RAH
ROW
ROW
Address
V
IH-
V
IL-
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 14 -
Hidden Refresh Cycle ( Read )
t
RP
t
CRP
t
RCD
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
t
RAC
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
DQ
V
IH-
V
IL-
ROW
ADDRESS
Don't Care
t
RP
t
CAC
t
RCS
t
ASC
t
CAH
t
ASR
t
CAH
t
RAD
t
RAL
t
RSH
t
CHR
t
RC
t
RAS
t
RAS
COLUMN
ADDRESS
t
RC
t
WHR
t
AA
t
OEA
t
CLZ
t
OFF
t
OEZ
DATA-OUT
OPEN
Hidden Refresh Cycle ( Write )
NOTE : D
OUT
=Open
t
RP
t
CRP
t
RCD
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
t
DS
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
DQ
V
IH-
V
IL-
ROW
ADDRESS
Don't Care
t
RP
t
DH
t
WP
t
WCH
t
WCS
t
ASC
t
CAH
t
ASC
t
CAH
t
RAD
t
RSH
t
CHR
t
RC
t
RAS
t
RAS
COLUMN
ADDRESS
DATA-IN
t
RC
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 15 -
CAS - Before RAS Refresh Counter Test Cycle
t
CAS
t
CPT
V
IH-
V
IL-
RAS
V
IH-
V
IL-
CAS
t
RP
t
RAS
t
CSR
t
CHR
t
RSH
t
RAL
t
ASC
t
AA
t
CAC
t
RCS
t
RRH
t
RCH
t
WRP
t
WRH
t
WRH
t
WRP
t
OEA
t
CEZ
t
OEZ
t
CLZ
t
RWL
t
CWL
t
WCH
t
WCS
t
WP
t
DS
t
DH
t
RCS
t
AWD
t
CWD
t
RWL
t
CWL
t
WP
t
DH
t
DS
t
OED
t
OEZ
t
CLZ
t
CAC
t
AA
t
OEA
OPEN
COLUMN
ADDRESS
VALID DATA-OUT
VALID DATA-IN
Don't Care
VALID
DATA-IN
VALID
DATA-OUT
V
IH-
V
IL-
Address
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
OH-
V
OL-
DQ
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
IH-
V
IL-
DQ
V
IH-
V
IL-
WE
V
IH-
V
IL-
OE
V
I/OH-
V
I/OL-
DQ
Read Cycle
Write Cycle
Read-Modify-Write
t
CAH
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 16 -
CAS-Before-RAS Self Refresh Cycle
t
RPS
t
RASS
t
RP
t
RPC
t
CP
t
CSR
t
CEZ
OPEN
t
RPC
Don't Care
V
IH-
V
IL-
V
IH-
V
IL-
V
I/OH-
V
I/OL-
RAS
CAS
DQ
t
CHS
t
WRP
t
WRH
V
IH-
V
IL-
WE
NOTE : OE , Address = Don't Care
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 17 -
Ordering Information
Part Number
SPEED
POWER
FEATURE TEMPERATURE
PACKAGE
GLT441L04-50J3
50ns
Normal
FPM
Commercial
SOJ 300mil 26(20)L
GLT441L04-60J3
60ns
Normal
FPM
Commercial
SOJ 300mil 26(20)L
GLT441L04-70J3
70ns
Normal
FPM
Commercial
SOJ 300mil 26(20)L
GLT441L04-50TC
50ns
Normal
FPM
Commercial
TSOPII 300mil 26(20)L
GLT441L04-60TC
60ns
Normal
FPM
Commercial
TSOPII 300mil 26(20)L
GLT441L04-70TC
70ns
Normal
FPM
Commercial
TSOPII 300mil 26(20)L
GLT441L04E-50J3
50ns
Normal
FPM
Extended
SOJ 300mil 26(20)L
GLT441L04E-60J3
60ns
Normal
FPM
Extended
SOJ 300mil 26(20)L
GLT441L04E-70J3
70ns
Normal
FPM
Extended
SOJ 300mil 26(20)L
GLT441L04E-50TC
50ns
Normal
FPM
Extended
TSOPII 300mil 26(20)L
GLT441L04E-60TC
60ns
Normal
FPM
Extended
TSOPII 300mil 26(20)L
GLT441L04E-70TC
70ns
Normal
FPM
Extended
TSOPII 300mil 26(20)L
GLT441L04S-50J3
50ns
Self Refresh
FPM
Commercial
SOJ 300mil 26(20)L
GLT441L04S-60J3
60ns
Self Refresh
FPM
Commercial
SOJ 300mil 26(20)L
GLT441L04S-70J3
70ns
Self Refresh
FPM
Commercial
SOJ 300mil 26(20)L
GLT441L04S-50TC
50ns
Self Refresh
FPM
Commercial
TSOPII 300mil 26(20)L
GLT441L04S-60TC
60ns
Self Refresh
FPM
Commercial
TSOPII 300mil 26(20)L
GLT441L04S-70TC
70ns
Self Refresh
FPM
Commercial
TSOPII 300mil 26(20)L
GLT441L04SE-50J3
50ns
Self Refresh
FPM
Extended
SOJ 300mil 26(20)L
GLT441L04SE-60J3
60ns
Self Refresh
FPM
Extended
SOJ 300mil 26(20)L
GLT441L04SE-70J3
70ns
Self Refresh
FPM
Extended
SOJ 300mil 26(20)L
GLT441L04SE-50TC
50ns
Self Refresh
FPM
Extended
TSOPII 300mil 26(20)L
GLT441L04SE-60TC
60ns
Self Refresh
FPM
Extended
TSOPII 300mil 26(20)L
GLT441L04SE-70TC
70ns
Self Refresh
FPM
Extended
TSOPII 300mil 26(20)L
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 18 -
Parts Numbers (Top Mark) Definition :
GLT 4 41 L 04 S E - 60 TC
4 : DRAM
6 : Standard
SRAM
7 : Cache SRAM
8 : Synchronous
Burst SRAM
-SRAM
064 : 8K
256 : 256K
512 : 512K
100 : 1M
-DRAM
10 : 1M(C/EDO)*
11 : 1M(C/FPM)*
12 : 1M(H/EDO)*
13 : 1M(H/FPM)*
20 : 2M(EDO)
21 : 2M(FPM)
40 : 4M(EDO)
41 : 4M(FPM)
80 : 8M(EDO)
81 : 8M(FPM)
160 : 16M(EDO)
161 : 16M(FPM)
*See note
VOLTAGE
Blank : 5V
L : 3.3V
M : 2.5V
N : 2.1V
CONFIG.
04 : x04
08 : x08
16 : x16
32 : x32
SPEED
-SRAM
12 : 12ns
15 : 15ns
20 : 20ns
-DRAM
35 : 35ns
40 : 40ns
45 : 45ns
50 : 50ns
60 : 60ns
70 : 70ns
PACKAGE
T : PDIP(300mil)
TS : TSOP(Type I)
TC : TSOP(Type ll)
PL : PLCC
FA : 300mil SOP
FB : 330mil SOP
FC : 445mil SOP
J3 : 300mil SOJ
J4 : 400mil SOJ
P : PDIP(600mil)
Q : PQFP
TQ : TQFP
Self Refresh Low Power
Temperature Range
E : Extended Temperature
I : Industrial Temperature
S : Self Refresh
G -LINK
GLT441L04
1M X 4 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Nov. 2001 (Rev. 1.0)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 19 -
Package Information
300mil 20/26 Lead Thin Small Outline Package SOJ
300mil 20/26 Lead Thin Small Outline Package (TSOP) TYPE II
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