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Datasheet: F369GA (Fujitsu Media Devices Limited)

32-BIT RISC MICROCONTROLLER

 

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Fujitsu Media Devices Limited

Document Outline

DS07-16401-3E
FUJITSU SEMICONDUCTOR
DATA SHEET
32-bit RISC Microcontroller
CMOS
FR50 Family MB91360G Series
MB91FV360GA/F362GA/F369GA
s
DESCRIPTION
The Fujitsu MB91360G series is a standard microcontroller containing a wide range of I/O peripherals and bus
control functions. The MB91360G series features a 32-bit RISC CPU (FR50 series) core and is suitable for
embedded control applications requiring high-performance and high-speed CPU processing. The MB91360G
series also contains up to 4 Kbytes instruction cache memory and other internal memories to improve the execution
speed of the CPU.
s
FEATURES
Execution time : down to 15.6 ns (64 MHz)
FR50 series CPU : RISC architecture
The CPU has a general-purpose register architecture with improved numeric implementation whereby a wide
range of delayed branch instructions reduces losses in execution time due to pipeline breaks.
Bit manipulation instructions and memory access instructions have been enhanced resulting in improved code
efficiency and execution speed for control implementation.
A five-stage pipeline structure provides high-speed processing (one instruction per cycle)
32-bit linear address space : 4 Gbytes
Fixed 16-bit instruction size (basic instructions)
High-speed multiplication/step division
High-speed interrupt processing (6 cycles)
General-purpose registers : 16
32 bits
(Continued)
s
PACKAGE
401-pin Ceramics PGA
208-pin plastic QFP
160-pin plastic QFP
(PGA-401C-A02)
(FPT-208P-M04)
(FPT-160P-M15)
MB91360G Series
2
(Continued)
External bus interface unit with a wide range of functions
Divides the external memory space into a maximum of eight areas. Chip select signal setting, data bus width
selection (8, 16, 32-bit) , and area size can be specified for each area.
Address bus up to 32 bit wide
Programmable auto-wait function
Internal instruction cache
The MB91360G series contains up to 4-Kbyte instruction cache to improve the execution speed of external
programs.
Two-way set associative caching
DMAC
Direct memory access (DMA) can be used to perform various types of data transfer without going via the CPU.
This improves system performance.
Eight channels (including up to 3 external channels)
Three transfer modes supported : single/block, burst, continuous transfer
Power consumption control mechanisms
The MB91360G series contains a number of functions for controlling the operating clock to reduce power
consumption.
Software control : Sleep and stop/real time clock functions
Hardware control : Hardware standby function
Gear (divider) function : The CPU and peripheral clock frequencies can be set independently.
Contains a range of peripheral functions
UART, U-timer
Real Time Clock (with optional subclock operation and subclock calibration module)
Stepper Motor Control
Sound Generator
Serial IO (SIO) , SIO-Prescaler
Power Down Reset
Alarm Comparator
IO-Timer
I
2
C Interface
10 Bit D/A Converter
CAN Interface
10-bit A/D converter
16-bit reload timer
16-bit PWM timer
Watchdog timer
Bit search module
Interrupt controller
External interrupt inputs
I/O port function
Interrupt levels
"16 maskable interrupt levels"
Other
Power supply voltage
5 V power supply used, the internal regulator creates internal supply of 3.3 V
Package : MB91FV360GA uses a PGA401 package, MB91F362GA is delivered in a QFP208 package, and
MB91F369GA in QFP160 package.
MB91360G Series
3
s
PRODUCT LINEUP
Resource Channels
Memory Size
MB91FV360GA
MB91F362GA
MB91F369GA
Cache/Instruction RAM
4 KB / 4 KB
- / 4 KB
- / 4 KB
D-bus RAM
16 KB
12 KB
16 KB
F-bus RAM
16 KB
4 KB
16 KB
Flash/ROM
512 KB on F-bus
512 KB on F-bus
512 KB on F-bus
Boot ROM
2 KB
2 KB
2 KB
CAN
4 ch
3 ch
2 ch
Stepper Motor Control
4 ch
4 ch
Sound Generator
1 ch
1 ch
1 ch
PPG
8 ch
8 ch
4 ch
Input Capture
4 ch
4 ch
Output Compare
4 ch
4 ch
Free Running Timer
2 ch
2 ch
D/A Converter
2 ch
2 ch
A/D Converter
16 ch
16 ch
10 ch
I
2
C 100 kHz
I
2
C 400 kHz
1 ch
1 ch
1 ch
Alarm Comparator
1 ch
1 ch
1 ch
SIO/SIO prescaler
2 ch
2 ch
2 ch
UART/U-Timer
3 ch
3 ch
1 ch
16-bit Reload Timer
6 ch
6 ch
6 ch
Ext. Interrupt
8 ch
8 ch
8 ch
Non maskable Interrupt
1
Real Time Clock
1
1
1
32 kHz subclock option for RTC
yes
no
no
subclock calibration
yes
no
no
LED port
8 bit
8 bit
Power down Reset
1
1
1
Bit search Module
1
1
1
Watchdog timer
1
1
1
Ext. Address Bus
32 bit
21 bit
up to 24 bit
Ext. Data Bus
32 bit
32 bit
32 bit
Ext. DMA
3 ch
1 ch
1 ch
Max operating frequency
64 MHz
64 MHz
64 MHz
MB91360G Series
4
s
PIN ASSIGNMENTS



MB91FV360GA
(BOTTOM VIEW)
(PGA-401C-A02)
24
23
25
26
27
28
29
30
31
32
33
70
69
71
72
73
74
75
76
77
78
79
80
120
119
121
122
123
124
125
126
127
128
129
130
131
175
174
176
177
178
179
180
181
182
183
184
185
186
187
231
230
232
233
234
235
236
237
238
239
240
241
242
243
244
284
173
285
286
287
288
289
290
291
292
293
294
295
296
297
188
229
118
334
335
336
337
338
339
340
341
342
343
344
345
346
245
132
172
68
22
117
228
333
67
171
282
379
21
116
227
332
66
170
281
378
20
115
226
331
65
169
280
377
19
114
225
330
64
168
279
376
18
113
224
329
63
167
278
375
17
112
223
328
62
166
277
374
16
111
222
327
61
165
276
373
15
110
221
326
60
164
275
372
14
109
220
325
59
163
274
371
13
108
219
324
58
162
273
370
12
107
218
323
57
161
272
369
368
367
366
365
364
363
362
361
360
359
358
320
319
318
317
316
315
314
313
312
311
310
257
144
201
268
267
266
265
264
263
262
261
260
259
258
212
211
210
209
208
207
206
205
204
203
202
155
154
153
152
151
150
149
148
147
146
145
101
100
99
98
97
96
95
94
93
52
51
50
49
48
47
46
45
7
6
5
4
3
2
1
309
200
92
106
217
322
321
160
271
270
269
216
215
214
213
159
158
157
156
105
104
103
102
56
55
54
53
11
10
9
8
283
380
381
382
383
384
385
386
387
388
389
390
391
298
189
81
347
246
133
34
392
299
190
82
348
247
134
35
393
300
191
83
349
248
135
36
394
301
192
84
350
249
136
37
395
302
193
85
351
250
137
38
396
303
194
86
352
251
138
39
397
304
195
87
353
252
139
40
398
305
196
88
354
253
140
41
399
306
197
89
355
254
141
42
400
307
198
90
356
255
142
43
401
308
199
91
357
256
143
44
INDEX
MB91360G Series
5



MB91F362GA
(TOP VIEW)
(FPT-208P-M04)
156
157
UART
PQ [5:0]
PP [5:0]
PO [7:0]
PN [5:0] PM [3:0]
P9 [7:0]
P8 [7:0]
P7 [4:6]
P6 [4:0]
P5 [7:0]
P4 [7:0]
P3 [7:0]
P2 [7:0]
P1 [7:0]
P0 [7:0]
PS [7:0]
PR [7:0]
PL [7:0]
PK [7:0]
PJ [7:0]
PI [6:0]
PH [7:0]
PB [2:0]
PG [7:0]
CAN
PPG
SIO
I
2
C
XTAL
+
PLL
OCU
ICU
LED
DAC
ADC
DMA
ADC
53
52
1
208
INDEX
SMC
105
104
SIN2
SOT1
SIN1
SOT0
SIN0
RX2
TX2
RX1
TX1
RX0
TX0
V
SS
V
DD
OCPA7
OCPA6
OCPA5
OCPA4
OCPA3
OCPA2
OCPA1
OCPA0
SCK3
SOT3
SIN3
SCK4
SIN4
SOT4
SCL
SDA
SGA
SGO
VCI
CPO
V
SS
X1A
X0A
X1
X0
V
DD
SELCLK
MONCLK
INITX
HSTX
MD2
MD1
MD0
V
SS
OUT3
OUT2
OUT1
OUT0
IN3
D24
D25
D26
D27
D28
D29
D30
D31
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
V
DD
V
SS
A16
A17
A18
A19
A20
CS4X
CS5X
CS6X
RDY
BGRNTX
BRQ
RDX
WR0X
WR1X
WR2X
WR3X
AS
ALE
CLK
AH/BOOT
CS0X
CS1X
CS2X
CS3X
V
DD
V
SS
IN2
IN1
IN0
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INT0
V
SS
V
DD
LED7
LED6
LED5
LED4
LED3
LED2
LED1
LED0
LTESTX
CPUTESTX
TESTX
ATGX
V
DD
V
SS
ALARM
DA1
DA0
AV
SS
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
AVRH
AV
CC
DEOP0
DACK0
DREQ0
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
SOT2
V
SS
V
CC
3C
V
DD
HV
SS
PWM1P0
PWM1M0
PWM2P0
PWM2M0
HV
DD
PWM1P1
PWM1M1
PWM2P1
PWM2M1
HV
SS
PWM1P2
PWM1M2
PWM2P2
PWM2M2
HV
DD
PWM1P3
PWM1M3
PWM2P3
PWM2M3
HV
SS
V
DD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
V
DD
V
SS
D15
D16
D17
D18
D19
D20
D21
D22
D23
Ext. Interrupt
Ext. Bus Data
Ext. Bus Address
Chip
Select
Ext. Bus Control
Chip
Select
Mode
Sound
Gen.
MB91360G Series
6



MB91F369GA
(TOP VIEW)
(FPT-160P-M15)
P0 [3:0] PQ [1:0] PP [3:0]
PB [2:0]
P8 [7:0]
P7 [6:4]
PN [5:0]
PK [7:0]
PG [1:0]
PH [7:0]
Ext.Bus Control
Osci.
CAN
SIO
Mode
ADC
Ext. Bus Data
VSS
VDD35
RDY
WR0X
WR1X
WR2X
WR3X
VSS
VDD35
VSS
MONCLK
VDD
VSS
X1
X0
VDD
OCPA3
OCPA2
OCPA1
OCPA0
VSS
VDD
SOT0
SIN0
RX1
TX1
RX0
TX0
VSS
VCC3C
VDDI
VDDI
VDDI
VDDI
VSS
SCK3
SOT3
SIN3
SCK4
SIN4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
VDD35
VSS
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
VDD35
VSS
A0
A1
A2
A3
120
117
119
116
118
115
112
113
114
111
99
104
106
101
100
102
103
105
107
108
109
110
95
90
91
92
93
94
96
97
98
A4
A5
A6
A7
A8
A9
A10
A11
VDD35
CLK
VSS
A12
A13
A14
A15
A16
A17
A18
A19
A20
VDD35
VSS
CS4X
CS5X
CS6X
RDX
BGRNTX
BRQ
AS
ALE
AH
CS0X
CS1X
CS2X
CS3X
DREQ0
DACX0
DEOP
VSS
VDD35
1
2
7
6
5
4
3
9
10
8
11
13
12
14
16
15
17
18
19
20
21
30
29
28
27
26
25
24
23
22
40
39
38
37
36
35
34
33
32
31
121
125
130
129
128
123
127
126
124
122
142
141
140
139
137
138
136
135
133
134
132
131
150
149
151
152
148
147
146
145
144
143
159
158
157
154
155
156
153
160
SOT4
SCL
SDA
SGA
SGO
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INT0
VSS
VDD
LTESTX
CPUTESTX
TESTX
INITX
HSTX
MD2
MD1
MD0
ATGX
VDD
VSS
ALARM
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
AVSS
AVCC
AVRH
80
76
71
72
73
74
75
77
78
79
61
62
63
64
65
66
67
68
69
70
51
52
53
54
55
56
57
58
59
60
41
42
43
44
45
46
47
48
49
50
81
84
88
89
82
86
83
85
87
PPG
UART
I C
2
Sound
Gen.
Ext.Interrupt
Ext. Bus Address
DMA
Chip
Select
Chip
Select
Ext. Bus
Control
PM [3:0]
P13
MB91360G Series
7
s
PIN DESCRIPTIONS
MB91FV360GA I/O Pins and Their Functions
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
1
D18
I/O
Q
Ext. Bus Data Bit 18
2
D11
I/O
Q
Ext. Bus Data Bit 11
3
D2
I/O
Q
Ext. Bus Data Bit 2
4
not connected
5
HVSS
6
HVDD5B
7
PWM2M1
I/O
PR7
M
SMC 1
8
PWM1M1
I/O
PR5
K
SMC 1
9
PWM1P0
I/O
PR0
K
SMC 0
10
VDD5R
11
VDD5P
12
SCK4
I/O
PN2
A
SIO Clock
13
VDD5J
14
EXRAM
I
P
Trace Control
15
TWRX
O
X
Trace Control
16
TAD9
O
X
Trace Address
17
TAD5
O
X
Trace Address
18
TAD3
O
X
Trace Address
19
TDT68
I/O
W
Trace Data
20
TDT63
I/O
W
Trace Data
21
TDT57
I/O
W
Trace Data
22
TDT49
I/O
W
Trace Data
23
TDT23
I/O
W
Trace Data
24
TDT16
I/O
W
Trace Data
25
TDT7
I/O
W
Trace Data
26
TDT2
I/O
W
Trace Data
27
ICD0
I/O
N
ICE Data
28
ICLK
I/O
L
ICE Clock
29
X0
H
4 MHz Oscillator Pin
30
INTX
I
U
Initial Pin
31
MD1
I
T
Mode Pin 1
32
IN3
I/O
PL3
A
ICU Input 3
33
INT3
I/O
PK3
A
Ext. Interrupt 3
MB91360G Series
8
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
34
AN3
I/O
PH3
B
ADC Input 3
35
DACK2
I/O
PB6
A
DMA Acknowledge 2
36
AN13
I/O
PG5
B
ADC Input 13
37
AN8
I/O
PG0
B
ADC Input 8
38
ALE
I/O
P91
A
Ext. Bus Control
39
WR1X
I/O
P85
S
Ext. Bus Control
40
RDX
I/O
P83
S
Ext. Bus Control
41
CS7X
I/O
A
Chip Select 7 (CANs)
42
A26
I/O
Q
Ext. Bus Address Bit 26
43
A20
I/O
Q
Ext. Bus Address Bit 20
44
A12
I/O
Q
Ext. Bus Address Bit 12
45
D21
I/O
Q
Ext. Bus Data Bit 21
46
D16
I/O
Q
Ext. Bus Data Bit 16
47
D13
I/O
Q
Ext. Bus Data Bit 13
48
D7
I/O
Q
Ext. Bus Data Bit 7
49
D3
I/O
Q
Ext. Bus Data Bit 3
50
VSS
51
PWM2P2
I/O
PS2
K
SMC 2
52
PWM2P1
I/O
PR6
K
SMC 1
53
PWM1P1
I/O
PR4
K
SMC 1
54
not connected
55
SIN1
I/O
PQ2
A
UART 1 Input
56
TX3
I/O
PP6
Q
CAN 3 TX
57
SOT3
I/O
PN4
A
SIO Output
58
SOT4
I/O
PN0
A
SIO Output
59
not connected
60
not connected
61
SGO
I/O
PM0
A
Sound Generator SGO
62
TOEX
O
X
Trace Control
63
TAD8
O
X
Trace Address
64
TAD2
O
X
Trace Address
65
TDT67
I/O
W
Trace Data
66
TDT60
I/O
W
Trace Data
MB91360G Series
9
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
67
TDT54
I/O
W
Trace Data
68
TDT48
I/O
W
Trace Data
69
TDT26
I/O
W
Trace Data
70
TDT21
I/O
W
Trace Data
71
TDT18
I/O
W
Trace Data
72
TDT12
I/O
W
Trace Data
73
TDT8
I/O
W
Trace Data
74
TDT3
I/O
W
Trace Data
75
ICS2
O
G
ICE Status
76
VDD5F
77
RSTX
I
E
Reset Pin
78
OUT2
I/O
PL6
A
OCU Output 2
79
IN0
I/O
PL0
A
ICU Input 0
80
INT2
I/O
PK2
A
Ext. Interrupt 2
81
AN6
I/O
PH6
B
ADC Input 6
82
AN1
I/O
PH1
B
ADC Input 1
83
AVCC
Analog VCC
84
DEOP0
I/O
PB2
A
DMA EOP 0
85
AN14
I/O
PG6
B
ADC Input 14
86
AN9
I/O
PG1
B
ADC Input 9
87
AS
I/O
P90
A
Ext. Bus Control
88
BRQ
I/O
P82
A
Ext. Bus Control
89
CS6X
I/O
P76
A
Chip Select 6
90
A23
I/O
Q
Ext. Bus Address Bit 23
91
A17
I/O
Q
Ext. Bus Address Bit 17
92
A11
I/O
Q
Ext. Bus Address Bit 11
93
D27
I/O
Q
Ext. Bus Data Bit 27
94
D22
I/O
Q
Ext. Bus Data Bit 22
95
D17
I/O
Q
Ext. Bus Data Bit 17
96
D6
I/O
Q
Ext. Bus Data Bit 16
97
VDD5S
98
PWM1M3
I/O
PS5
K
SMC 3
99
PWM2M3
I/O
PS7
M
SMC 3
100
HVDD5A
MB91360G Series
10
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
101
PWM2P0
I/O
PR2
K
SMC0
102
VCC3/C
C
Bypass Capacitor Pin
103
SOT1
I/O
PQ3
A
UART 1 Output
104
SIN0
I/O
PQ0
A
UART 0 Input
105
TX1
I/O
PP2
Q
CAN 1 TX
106
OCPA2
I/O
PO2
A
PPG Output
107
SCK3
I/O
PN5
A
SIO Clock
108
SIN4
I/O
PN1
A
SIO Input
109
SCL
I/O
PM3
Y
I
2
C SCL
110
TCLK
I/O
W
Trace Control
111
TAD12
O
X
Trace Address
112
TAD15
O
X
Trace Address
113
TAD1
O
X
Trace Address
114
TDT65
I/O
W
Trace Data
115
TDT59
I/O
W
Trace Data
116
TDT55
I/O
W
Trace Data
117
TDT51
I/O
W
Trace Data
118
TDT42
I/O
W
Trace Data
119
TDT32
I/O
W
Trace Data
120
TDT27
I/O
W
Trace Data
121
TDT22
I/O
W
Trace Data
122
TDT11
I/O
W
Trace Data
123
TDT4
I/O
W
Trace Data
124
ICD3
I/O
N
ICE Data
125
TDT1
I/O
W
Trace Data
126
SELCLK
I
F
Clock Selection
127
NMIX
I
E
Non maskable Interrupt
128
OUT1
I/O
PL5
A
OCU Output 1
129
IN1
I/O
PL1
A
ICU Input 1
130
INT5
I/O
PK5
A
Ext. Interrupt 5
131
LED4
I/O
PJ4
J
LED Port 4
132
ALARM
I
D
Alarm Comparator Input
133
AN7
I/O
PH7
B
ADC Input 7
134
AN2
I/O
PH2
B
ADC Input 2
MB91360G Series
11
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
135
DACK0
I/O
PB1
A
DMA acknowledge 0
136
AN10
I/O
PG2
B
ADC Input 10
137
CS0X
I/O
P94
A
Chip select 0
138
CS3X
I/O
P97
A
Chip select 3
139
BGRNTX
I/O
P81
A
Ext. Bus Control
140
CS4X
I/O
P74
A
Chip select 4
141
A22
I/O
Q
Ext. Bus Address Bit 22
142
A18
I/O
Q
Ext. Bus Address Bit 18
143
A14
I/O
Q
Ext. Bus Address Bit 14
144
A5
I/O
Q
Ext. Bus Address Bit 5
145
INDEX
146
D30
I/O
Q
Ext. Bus Data Bit 30
147
D26
I/O
Q
Ext. Bus Data Bit 26
148
D19
I/O
Q
Ext. Bus Data Bit 19
149
D10
I/O
Q
Ext. Bus Data Bit 10
150
D9
I/O
Q
Ext. Bus Data Bit 9
151
D5
I/O
Q
Ext. Bus Data Bit 5
152
PWM2M2
I/O
PS3
M
SMC 2
153
PWM1P3
I/O
PS4
K
SMC 3
154
PWM2M0
I/O
PR3
M
SMC 0
155
VSS
156
SOT2
I/O
PQ5
A
UART 2 Output
157
SOT0
I/O
PQ1
A
UART 0 Output
158
VDD5O
159
OCPA7
I/O
PO7
A
PPG Output
160
OCPA5
I/O
PO5
A
PPG Output
161
OCPA1
I/O
PO1
A
PPG Output
162
VDD5K
163
X1A
O
I
32 kHz Oscillator Pin
164
X0A
I
I
32 kHz Oscillator Pin
165
SDA
I/O
PM2
Y
I
2
C SDA
166
TAD10
O
X
Trace Address
167
TAD11
O
X
Trace Address
168
TDT66
I/O
W
Trace Data
MB91360G Series
12
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
169
TDT61
I/O
W
Trace Data
170
TDT58
I/O
W
Trace Data
171
TDT52
I/O
W
Trace Data
172
TDT45
I/O
W
Trace Data
173
TDT39
I/O
W
Trace Data
174
TDT35
I/O
W
Trace Data
175
TDT31
I/O
W
Trace Data
176
TDT24
I/O
W
Trace Data
177
TDT15
I/O
W
Trace Data
178
TDT14
I/O
W
Trace Data
179
TDT10
I/O
W
Trace Data
180
ICD1
I/O
N
ICE Data
181
ICD2
I/O
N
ICE Data
182
HSTX
I
E
Hardware Standby
183
OUT3
I/O
PL7
A
OCU Output 3
184
OUT0
I/O
PL4
A
OCU Output 0
185
INT6
I/O
PK6
A
Ext. Interrupt 6
186
LED7
I/O
PJ7
J
LED Port 7
187
LED1
I/O
PJ1
J
LED Port 1
188
CPUTESTX
I
E
Test Input
189
DA1
O
C
DAC Output
190
AN4
I/O
PH4
B
ADC Input 4
191
DEOP1
I/O
PB5
A
DMA EOP 1
192
DACK1
I/O
PB4
A
DMA Acknowledge 1
193
DREQ0
I/O
PB0
A
DMA Request 0
194
CLK
I/O
P92
A
Ext. Bus Clock
195
AH/BOOT
I/O
P93
A
Ext. Bus Control/Boot Signal
196
CS5X
I/O
P75
A
Chip Select 5
197
A24
I/O
Q
Ext. Bus Address Bit 24
198
A21
I/O
Q
Ext. Bus Address Bit 21
199
A15
I/O
Q
Ext. Bus Address Bit 15
200
A8
I/O
Q
Ext. Bus Address Bit 8
201
A2
I/O
Q
Ext. Bus Address Bit 2
202
A0
I/O
Q
Ext. Bus Address Bit 0
MB91360G Series
13
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
203
D29
I/O
Q
Ext. Bus Address Bit 29
204
D25
I/O
Q
Ext. Bus Address Bit 25
205
D20
I/O
Q
Ext. Bus Address Bit 20
206
D15
I/O
Q
Ext. Bus Address Bit 15
207
D4
I/O
Q
Ext. Bus Address Bit 4
208
HVDD5C
209
PWM1M2
I/O
PS1
K
SMC2
210
PWM1P2
I/O
PS0
K
SMC2
211
PWM1M0
I/O
PR1
K
SMC0
212
SIN2
I/O
PQ4
A
UART 2 Input
213
RX3
I/O
PP7
Q
CAN 3 RX
214
VSS
215
RX0
I/O
PP1
Q
CAN 0 RX
216
VDD5N
217
OCPA4
I/O
PO4
A
PPG Output
218
OCPA0
I/O
PO0
A
PPG Output
219
SIN3
I/O
PN3
A
SIO Input
220
VSS
221
SGA
I/O
PM1
A
Sound Generator SGA
222
TAD13
O
X
Trace Address
223
TAD7
O
X
Trace Address
224
TAD6
O
X
Trace Address
225
TDT64
I/O
W
Trace Data
226
TDT56
I/O
W
Trace Data
227
TDT50
I/O
W
Trace Data
228
TDT44
I/O
W
Trace Data
229
TDT41
I/O
W
Trace Data
230
TDT37
I/O
W
Trace Data
231
TDT34
I/O
W
Trace Data
232
TDT30
I/O
W
Trace Data
233
TDT25
I/O
W
Trace Data
234
TDT20
I/O
W
Trace Data
235
TDT9
I/O
W
Trace Data
236
BREAK
I
O
ICE Break
MB91360G Series
14
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
237
ICS1
O
G
ICE Status
238
ICS0
O
G
ICE Status
239
MD2
I
T
Mode Pin 2
240
IN2
I/O
PL2
A
ICU Input 2
241
INT4
I/O
PK4
A
Ext. Interrupt 4
242
LED6
I/O
PJ6
J
LED Port 6
243
LED3
I/O
PJ3
J
LED Port 3
244
not connected
245
TESTX
I
E
Test Input
246
DA0
O
C
DAC Output
247
AN5
I/O
PH5
B
ADC Input 5
248
AN0
I/O
PH0
B
ADC Input 0
249
AN15
I/O
PG7
B
ADC Input 15
250
CS1X
I/O
P95
A
Chip select 1
251
WR3X
I/O
P87
S
Ext. Bus Control
252
WR2X
I/O
P86
S
Ext. Bus Control
253
DREQ2
I/O
P73
A
DMA Request 2
254
A19
I/O
Q
Ext. Bus Address Bit 19
255
A13
I/O
Q
Ext. Bus Address Bit 13
256
A7
I/O
Q
Ext. Bus Address Bit 7
257
A4
I/O
Q
Ext. Bus Address Bit 4
258
D31
I/O
Q
Ext. Bus Data Bit 31
259
D28
I/O
Q
Ext. Bus Data Bit 28
260
D23
I/O
Q
Ext. Bus Data Bit 23
261
D14
I/O
Q
Ext. Bus Data Bit 14
262
D8
I/O
Q
Ext. Bus Data Bit 8
263
D1
I/O
Q
Ext. Bus Data Bit 1
264
D0
I/O
Q
Ext. Bus Data Bit 0
265
not connected
266
HVSS
267
not connected
268
VSS
269
RX2
I/O
PP5
Q
CAN 2 RX
270
RX1
I/O
PP3
Q
CAN 1 RX
MB91360G Series
15
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
271
VSS
272
OCPA3
I/O
PO3
A
PPG Output
273
VSS
274
not connected
275
VDD5I
276
TADSCX
O
X
Trace Control
277
TCE1X
O
X
Trace Control
278
TAD4
O
X
Trace Address
279
TAD0
O
X
Trace Address
280
TDT62
I/O
W
Trace Data
281
TDT53
I/O
W
Trace Data
282
TDT47
I/O
W
Trace Data
283
TDT43
I/O
W
Trace Data
284
TDT36
I/O
W
Trace Data
285
TDT33
I/O
W
Trace Data
286
TDT28
I/O
W
Trace Data
287
TDT19
I/O
W
Trace Data
288
TDT13
I/O
W
Trace Data
289
TDT6
I/O
W
Trace Data
290
TDT5
I/O
W
Trace Data
291
X1
H
4 MHz Oscillator Pin
292
MONCLK
O
G
Clock Output for test purposes
293
MD0
I
T
Mode Pin 0
294
INT7
I/O
PK7
A
Ext. Interrupt 7
295
INT1
I/O
PK1
A
Ext. Interrupt 1
296
LED5
I/O
PJ5
J
LED Port 5
297
LTESTX
I
E
Test Input
298
ATGX
I/O
PI3
A
Analog Reference Low
299
AVRL
R
Analog Reference High
300
AVRH
R
DMA Request 1
301
DREQ1
I/O
PB3
A
ADC Input 12
302
AN12
I/O
PG4
B
ADC Input 11
303
AN11
I/O
PG3
B
Ext. Bus Control
304
WR0X
I/O
P84
S
Ext. Bus Control
MB91360G Series
16
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
305
RDY
I/O
S
Ext. Bus Control
306
A25
I/O
Q
Ext. Bus Address Bit 25
307
A16
I/O
Q
Ext. Bus Address Bit 16
308
A10
I/O
Q
Ext. Bus Address Bit 10
309
A6
I/O
Q
Ext. Bus Address Bit 6
310
A1
I/O
Q
Ext. Bus Address Bit 1
311
not connected
312
D24
I/O
Q
Ext. Bus Data Bit 24
313
D12
I/O
Q
Ext. Bus Data Bit 12
314
not connected
315
PWM2P3
I/O
PS6
K
SMC 3
316
HVSS
317
HVSS
318
not connected
319
VDD5Q
320
TX2
I/O
PP4
Q
CAN 2 TX
321
TX0
I/O
PP0
Q
CAN 0 TX
322
OCPA6
I/O
PO6
A
PPG Output
323
VDD5M
324
VDD5L
325
not connected
326
VDD5H
327
TAD14
O
X
Trace Address
328
VSS3
329
VSS3
330
not connected
331
VDD3C
332
TDT46
I/O
W
Trace Data
333
TDT40
I/O
W
Trace Data
334
TDT38
I/O
W
Trace Data
335
VDD3B
336
TDT29
I/O
W
Trace Data
337
TDT17
I/O
W
Trace Data
338
VDD3A
MB91360G Series
17
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
339
TDT0
I/O
W
Trace Data
340
VSS
341
VSS
342
not connected
343
VDD5E
344
INT0
I/O
PK0
A
Ext. Interrupt 0
345
LED2
I/O
PJ2
J
LED Port 2
346
LED0
I/O
PJ0
J
LED Port 0
347
VDD5D
348
AVSS
Analog VSS
349
DEOP2
I/O
PB7
A
DMA EOP 2
350
VDD5C
351
CS2X
I/O
P96
A
Chip select 2
352
VSS
353
VSS
354
VDD5B
355
not connected
356
A9
I/O
Q
Ext. Bus Address Bit 9
357
A3
I/O
Q
Ext. Bus Address Bit 3
358
VSS
359
VSS
360
VDD5T
361
VSS
362
VSS
363
VSS
364
not connected
365
HVSS
366
VSS
367
VSS
368
not connected
369
VSS
370
VSS
371
not connected
372
VSS
MB91360G Series
18
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
373
VSS
374
VSS
375
VDD3D
376
VSS3
377
VSS3
378
VSS3
379
not connected
380
VSS3
381
VSS3
382
not connected
383
VSS3
384
VSS3
385
VSS3
386
VDD5G
387
VSS
388
VSS
389
VSS
390
not connected
391
VSS
392
VSS
393
not connected
394
VSS
395
VSS
396
VSS
397
not connected
398
VSS
399
VSS
400
VSS
401
VDD5A
MB91360G Series
19
MB91FV362GA I/O Pins and Their Functions
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
1
D24
I/O
Q
Ext. Bus Data Bit 24
2
D25
I/O
Q
Ext. Bus Data Bit 25
3
D26
I/O
Q
Ext. Bus Data Bit 26
4
D27
I/O
Q
Ext. Bus Data Bit 27
5
D28
I/O
Q
Ext. Bus Data Bit 28
6
D29
I/O
Q
Ext. Bus Data Bit 29
7
D30
I/O
Q
Ext. Bus Data Bit 30
8
D31
I/O
Q
Ext. Bus Data Bit 31
9
A0
I/O
Q
Ext. Bus Address Bit 0
10
A1
I/O
Q
Ext. Bus Address Bit 1
11
A2
I/O
Q
Ext. Bus Address Bit 2
12
A3
I/O
Q
Ext. Bus Address Bit 3
13
A4
I/O
Q
Ext. Bus Address Bit 4
14
A5
I/O
Q
Ext. Bus Address Bit 5
15
A6
I/O
Q
Ext. Bus Address Bit 6
16
A7
I/O
Q
Ext. Bus Address Bit 7
17
A8
I/O
Q
Ext. Bus Address Bit 8
18
A9
I/O
Q
Ext. Bus Address Bit 9
19
A10
I/O
Q
Ext. Bus Address Bit 10
20
A11
I/O
Q
Ext. Bus Address Bit 11
21
A12
I/O
Q
Ext. Bus Address Bit 12
22
A13
I/O
Q
Ext. Bus Address Bit 13
23
A14
I/O
Q
Ext. Bus Address Bit 14
24
A15
I/O
Q
Ext. Bus Address Bit 15
25
VDD35
Separated Ext. Bus VDD, 3.3 V or 5.0 V
26
VSS
27
A16
I/O
Q
Ext. Bus Address Bit 16
28
A17
I/O
Q
Ext. Bus Address Bit 17
29
A18
I/O
Q
Ext. Bus Address Bit 18
30
A19
I/O
Q
Ext. Bus Address Bit 19
31
A20
I/O
Q
Ext. Bus Address Bit 20
32
CS4X
I/O
P74
A
Chip select 4
33
CS5X
I/O
P75
A
Chip select 5
MB91360G Series
20
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
34
CS6X
I/O
P76
A
Chip select 6
35
RDY
I/O
S
Ext. Bus Control
36
BGRNT
I/O
P81
A
Ext. Bus Control
37
BRQ
I/O
P82
A
Ext. Bus Control
38
RDX
I/O
S
Ext. Bus Control
39
WR0X
I/O
S
Ext. Bus Control
40
WR1X
I/O
S
Ext. Bus Control
41
WR2X
I/O
S
Ext. Bus Control
42
WR3X
I/O
S
Ext. Bus Control
43
AS
I/O
P90
A
Ext. Bus Control
44
ALE
I/O
P91
A
Ext. Bus Control
45
CLK
I/O
A
Ext. Bus Clock
46
AH
I/O
P93
A
Ext. Bus Control Signal
47
CS0X
I/O
P94
A
Chip select 0
48
CS1X
I/O
P95
A
Chip select 1
49
CS2X
I/O
P96
A
Chip select 2
50
CS3X
I/O
P97
A
Chip select 3
51
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
52
VSS
53
AN8
I/O
PG0
B
ADC Input 8
54
AN9
I/O
PG1
B
ADC Input 9
55
AN10
I/O
PG2
B
ADC Input 10
56
AN11
I/O
PG3
B
ADC Input 11
57
AN12
I/O
PG4
B
ADC Input 12
58
AN13
I/O
PG5
B
ADC Input 13
59
AN14
I/O
PG6
B
ADC Input 14
60
AN15
I/O
PG7
B
ADC Input 15
61
DREQ0
I/O
PB0
A
DMR Request 0
62
DACK0
I/O
PB1
A
DMA Acknowledge 0
63
DEOP0
I/O
PB2
A
DMA EOP 0
64
AVCC
Analog VCC
65
AVRH
R
Analog Reference High
66
AN0
I/O
PH0
B
ADC Input 0
MB91360G Series
21
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
67
AN1
I/O
PH1
B
ADC Input 1
68
AN2
I/O
PH2
B
ADC Input 2
69
AN3
I/O
PH3
B
ADC Input 3
70
AN4
I/O
PH4
B
ADC Input 4
71
AN5
I/O
PH5
B
ADC Input 5
72
AN6
I/O
PH6
B
ADC Input 6
73
AN7
I/O
PH7
B
ADC Input 7
74
AVSS, AVRL
Analog VSS, Analog Reference Low
75
DA0
O
C
DAC Output
76
DA1
O
C
DAC Output
77
ALARM
I
D
Alarm Comparator Input
78
VSS
79
VDD
80
ATGX
I/O
PI3
A
ADC Trigger Input
81
TESTX
I
E
Test Input
(should be connected to VDD)
82
CPUTESTX
I
E
Test Input
(should be connected to VDD)
83
LTESTX
I
E
Test Input
(should be connected to VDD)
84
LED0
I/O
PJ0
J
LED Port 0
85
LED1
I/O
PJ1
J
LED Port 1
86
LED2
I/O
PJ2
J
LED Port 2
87
LED3
I/O
PJ3
J
LED Port 3
88
LED4
I/O
PJ4
J
LED Port 4
89
LED5
I/O
PJ5
J
LED Port 5
90
LED6
I/O
PJ6
J
LED Port 6
91
LED7
I/O
PJ7
J
LED Port 7
92
VDD
93
VSS
94
INT0
I/O
PK0
A
Ext. Interrupt 0
95
INT1
I/O
PK1
A
Ext. Interrupt 1
96
INT2
I/O
PK2
A
Ext. Interrupt 2
97
INT3
I/O
PK3
A
Ext. Interrupt 3
98
INT4
I/O
PK4
A
Ext. Interrupt 4
99
INT5
I/O
PK5
A
Ext. Interrupt 5
100
INT6
I/O
PK6
A
Ext. Interrupt 6
MB91360G Series
22
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
101
INT7
I/O
PK7
A
Ext. Interrupt 7
102
IN0
I/O
PL0
A
ICU Input 0
103
IN1
I/O
PL1
A
ICU Input 1
104
IN2
I/O
PL2
A
ICU Input 2
105
IN3
I/O
PL3
A
ICU Input 3
106
OUT0
I/O
PL4
A
OCU Output 0
107
OUT1
I/O
PL5
A
OCU Output 1
108
OUT2
I/O
PL6
A
OCU Output 2
109
OUT3
I/O
PL7
A
OCU Output 3
110
VSS
111
MD0
I
T
Mode Pin 0
112
MD1
I
T
Mode Pin 1
113
MD2
I
T
Mode Pin 2
114
HSTX
I
E
Hardware Standby
115
INITX
I
U
Initial Pin
116
MONCLK
O
G
System Clock Output for evaluation
purposes
117
SELCLK
I
F
Clock Selection, must be connected
to VDD
118
VDD
119
X0
H
4 MHz Oscillator Pin
120
X1
H
4 MHz Oscillator Pin
121
X0A
I
I
reserved-must be connected to VSS
122
X1A
O
I
reserved-should be left open
123
VSS
124
CPO
C
reserved-should be left open
125
VCI
D
reserved-must be connected to VSS
126
SGO
I/O
PM0
A
Sound Generator SGO
127
SGA
I/O
PM1
A
Sound Generator SGA
128
SDA
I/O
PM2
Y
I
2
C SDA
129
SCL
I/O
PM3
Y
I
2
C SCL
130
SOT4
I/O
PN0
A
SIO Output
131
SIN4
I/O
PN1
A
SIO Input
132
SCK4
I/O
PN2
A
SIO Clock
133
SIN3
I/O
PN3
A
SIO Input
134
SOT3
I/O
PN4
A
SIO Output
MB91360G Series
23
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
135
SCK3
I/O
PN5
A
SIO Clock
136
OCPA 0
I/O
PO0
A
PPG Output
137
OCPA 1
I/O
PO1
A
PPG Output
138
OCPA 2
I/O
PO2
A
PPG Output
139
OCPA 3
I/O
PO3
A
PPG Output
140
OCPA 4
I/O
PO4
A
PPG Output
141
OCPA 5
I/O
PO5
A
PPG Output
142
OCPA 6
I/O
PO6
A
PPG Output
143
OCPA 7
I/O
PO7
A
PPG Output
144
VDD
145
VSS
146
TX0
I/O
PP0
Q
CAN 0 TX
147
RX0
I/O
PP1
Q
CAN 0 RX
148
TX1
I/O
PP2
Q
CAN 1 TX
149
RX1
I/O
PP3
Q
CAN 1 RX
150
TX2
I/O
PP4
Q
CAN 2 TX
151
RX2
I/O
PP5
Q
CAN 2 RX
152
SIN0
I/O
PQ0
A
UART 0 Input
153
SOT0
I/O
PQ1
A
UART 0 Output
154
SIN1
I/O
PQ2
A
UART 1 Input
155
SOT1
I/O
PQ3
A
UART 1 Output
156
SIN2
I/O
PQ4
A
UART 2 Input
157
SOT2
I/O
PQ5
A
UART 2 Output
158
VSS
159
VCC3/C
C
Bypass Capacitor Pin
160
VDD
161
HVSS
162
PWM1P0
I/O
PR0
K
SMC 0
163
PWM1M0
I/O
PR1
K
SMC 0
164
PWM2P0
I/O
PR2
K
SMC 0
165
PWM2M0
I/O
PR3
M
SMC 0
166
HVDD
167
PWM1P1
I/O
PR4
K
SMC 1
168
PWM1M1
I/O
PR5
K
SMC 1
MB91360G Series
24
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
169
PWM2P1
I/O
PR6
K
SMC 1
170
PWM2M1
I/O
PR7
M
SMC 1
171
HVSS
172
PWM1P2
I/O
PS0
K
SMC 2
173
PWM1M2
I/O
PS1
K
SMC 2
174
PWM2P2
I/O
PS2
K
SMC 2
175
PWM2M2
I/O
PS3
M
SMC 2
176
HVDD
177
PWM1P3
I/O
PS4
K
SMC 3
178
PWM1M3
I/O
PS5
K
SMC 3
179
PWM2P3
I/O
PS6
K
SMC 3
180
PWM2M3
I/O
PS7
M
SMC 3
181
HVSS
182
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
183
D0
I/O
Q
Ext. Bus Data Bit 0
184
D1
I/O
Q
Ext. Bus Data Bit 1
185
D2
I/O
Q
Ext. Bus Data Bit 2
186
D3
I/O
Q
Ext. Bus Data Bit 3
187
D4
I/O
Q
Ext. Bus Data Bit 4
188
D5
I/O
Q
Ext. Bus Data Bit 5
189
D6
I/O
Q
Ext. Bus Data Bit 6
190
D7
I/O
Q
Ext. Bus Data Bit 7
191
D8
I/O
Q
Ext. Bus Data Bit 8
192
D9
I/O
Q
Ext. Bus Data Bit 9
193
D10
I/O
Q
Ext. Bus Data Bit 10
194
D11
I/O
Q
Ext. Bus Data Bit 11
195
D12
I/O
Q
Ext. Bus Data Bit 12
196
D13
I/O
Q
Ext. Bus Data Bit 13
197
D14
I/O
Q
Ext. Bus Data Bit 14
198
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
199
VSS
200
D15
I/O
Q
Ext. Bus Data Bit 15
201
D16
I/O
Q
Ext. Bus Data Bit 16
202
D17
I/O
Q
Ext. Bus Data Bit 17
MB91360G Series
25
(Continued)
Note : If pins VDD35 (25, 51, 182, 198) are connected to 3.3 V then the external bus interface (pins 1-52, 182-208)
can be operated at 3.3 V levels.
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
203
D18
I/O
Q
Ext. Bus Data Bit 18
204
D19
I/O
Q
Ext. Bus Data Bit 19
205
D20
I/O
Q
Ext. Bus Data Bit 20
206
D21
I/O
Q
Ext. Bus Data Bit 21
207
D22
I/O
Q
Ext. Bus Data Bit 22
208
D23
I/O
Q
Ext. Bus Data Bit 23
MB91360G Series
26
MB91F369GA I/O Pins and Their Functions
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
1
A4
I/O
Q
Ext. Bus Address Bit 4
2
A5
I/O
Q
Ext. Bus Address Bit 5
3
A6
I/O
Q
Ext. Bus Address Bit 6
4
A7
I/O
Q
Ext. Bus Address Bit 7
5
A8
I/O
Q
Ext. Bus Address Bit 8
6
A9
I/O
Q
Ext. Bus Address Bit 9
7
A10
I/O
Q
Ext. Bus Address Bit 10
8
A11
I/O
Q
Ext. Bus Address Bit 11
9
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
10
CLK
I/O
A
Ext. Bus Clock
11
VSS
12
A12
I/O
Q
Ext. Bus Address Bit 12
13
A13
I/O
Q
Ext. Bus Address Bit 13
14
A14
I/O
Q
Ext. Bus Address Bit 14
15
A15
I/O
Q
Ext. Bus Address Bit 15
16
A16
I/O
Q
Ext. Bus Address Bit 16
17
A17
I/O
Q
Ext. Bus Address Bit 17
18
A18
I/O
Q
Ext. Bus Address Bit 18
19
A19
I/O
Q
Ext. Bus Address Bit 19
20
A20
I/O
Q
Ext. Bus Address Bit 20
21
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
22
VSS
23
CS4X
I/O
P74
A
Chip Select 4
24
CS5X
I/O
P75
A
Chip Select 5
25
CS6X
I/O
P76
A
Chip Select 6
26
RDX
I/O
S
Ext. Bus Control
27
BGRNTX
I/O
P81
A
Ext. Bus Control
28
BRQ
I/O
P82
A
Ext. Bus Control
29
AS
I/O
P90
A
Ext. Bus Control
30
ALE
I/O
P91
A
Ext. Bus Control
31
AH
I/O
P93
A
Ext. Bus Control Signal
32
CS0X
I/O
P94
A
Chip select 0
33
CS1X
I/O
P95
A
Chip select 1
MB91360G Series
27
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
34
CS2X
I/O
P96
A
Chip select 2
35
CS3X
I/O
P97
A
Chip select 3
36
DREQ0
I/O
PB0
A
DMA Request 0
37
DACK0
I/O
PB1
A
DMA Acknowledge 0
38
DEOP0
I/O
PB2
A
DMA EOP 0
39
VSS
40
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
41
AVRH
R
Analog Reference High
42
AVCC
Analog VCC
43
AVSS, AVRL
Analog VSS, Analog Reference Low
44
AN0
I/O
PH0
B
ADC Input 0
45
AN1
I/O
PH1
B
ADC Input 1
46
AN2
I/O
PH2
B
ADC Input 2
47
AN3
I/O
PH3
B
ADC Input 3
48
AN4
I/O
PH4
B
ADC Input 4
49
AN5
I/O
PH5
B
ADC Input 5
50
AN6
I/O
PH6
B
ADC Input 6
51
AN7
I/O
PH7
B
ADC Input 7
52
AN8
I/O
PG0
B
ADC Input 8
53
AN9
I/O
PG1
B
ADC Input 9
54
ALARM
I
D
Alarm Comparator Input
55
VSS
56
VDD
57
ATGX
I/O
P13
A
ADC Trigger Input
58
MD0
I
T
Mode Pin 0
59
MD1
I
T
Mode Pin 1
60
MD2
I
T
Mode Pin 2
61
HSTX
I
E
Hardware Standby
62
INITX
I
U
Initual Pin
63
TESTX
I
E
Test Input
(should be connected to VDD)
64
CPUTESTX
I
E
Test Input
(should be connected to VDD)
65
LTESTX
I
E
Test Input
(should be connected to VDD)
66
VDD
MB91360G Series
28
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
67
VSS
68
INT0
I/O
PK0
A
Ext. Interrupt 0
69
INT1
I/O
PK1
A
Ext. Interrupt 1
70
INT2
I/O
PK2
A
Ext. Interrupt 2
71
INT3
I/O
PK3
A
Ext. Interrupt 3
72
INT4
I/O
PK4
A
Ext. Interrupt 4
73
INT5
I/O
PK5
A
Ext. Interrupt 5
74
INT6
I/O
PK6
A
Ext. Interrupt 6
75
INT7
I/O
PK7
A
Ext. Interrupt 7
76
SGO
I/O
PM0
A
Sound Generator SGO
77
SGA
I/O
PM1
A
Sound Generator SGA
78
SDA
I/O
PM2
Y
I
2
C SDA
79
SCL
I/O
PM3
Y
I
2
C SCL
80
SOT4
I/O
PN0
A
SIO Output
81
SIN4
I/O
PN1
A
SIO Input
82
SCK4
I/O
PN2
A
SIO Clock
83
SIN3
I/O
PN3
A
SIO Input
84
SOT3
I/O
PN4
A
SIO Output
85
SCK3
I/O
PN5
A
SIO Clock
86
VSS
87
VDDI
Supply voltage for internal regulator
88
VDDI
Supply voltage for internal regulator
89
VDDI
Supply voltage for internal regulator
90
VDDI
Supply voltage for internal regulator
91
VCC3C
Capacitor pin for internal regulator
92
VSS
93
TX0
I/O
PP0
Q
CAN 0 TX
94
RX0
I/O
PP1
Q
CAN 0 RX
95
TX1
I/O
PP2
Q
CAN 1 TX
96
RX1
I/O
PP3
Q
CAN 1 RX
97
SIN0
I/O
PQ0
A
UART 0 Input
98
SOT0
I/O
PQ1
A
UART 0 Output
99
VDD
100
VSS
MB91360G Series
29
(Continued)
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
101
OCPA0
I/O
PO0
A
PPG Output
102
OCPA1
I/O
PO1
A
PPG Output
103
OCPA2
I/O
PO2
A
PPG Output
104
OCPA3
I/O
PO3
A
PPG Output
105
VDDX
106
X0
H
4 MHz Oscillator Pin
107
X1
H
4 MHz Oscillator Pin
108
VSS
109
VDD
110
MONCLK
O
Q1
System Clock Output
111
VSS
112
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
113
VSS
114
WR3X
I/O
S
Ext. Bus Control
115
WR2X
I/O
S
Ext. Bus Control
116
WR1X
I/O
S
Ext. Bus Control
117
WR0X
I/O
S
Ext. Bus Control
118
RDY
I/O
S
Ext. Bus Control
119
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
120
VSS
121
D0
I/O
Q
Ext. Bus Data Bit 0
122
D1
I/O
Q
Ext. Bus Data Bit 1
123
D2
I/O
Q
Ext. Bus Data Bit 2
124
D3
I/O
Q
Ext. Bus Data Bit 3
125
D4
I/O
Q
Ext. Bus Data Bit 4
126
D5
I/O
Q
Ext. Bus Data Bit 5
127
D6
I/O
Q
Ext. Bus Data Bit 6
128
D7
I/O
Q
Ext. Bus Data Bit 7
129
D8
I/O
Q
Ext. Bus Data Bit 8
130
D9
I/O
Q
Ext. Bus Data Bit 9
131
D10
I/O
Q
Ext. Bus Data Bit 10
132
D11
I/O
Q
Ext. Bus Data Bit 11
133
D12
I/O
Q
Ext. Bus Data Bit 12
134
D13
I/O
Q
Ext. Bus Data Bit 13
MB91360G Series
30
(Continued)
Note : If pins VDD35 (9, 21, 40, 112, 119, 137, 155) are connected to a 3.3 V supply the external bus interface (pins
1-40, 112-160) can be operated at 3.3 V levels.
Pin No.
Pin Name
I/O
General
Purpose IO Port
Circuit Type
Function
135
D14
I/O
Q
Ext. Bus Data Bit 14
136
D15
I/O
Q
Ext. Bus Data Bit 15
137
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
138
VSS
139
D16
I/O
Q
Ext. Bus Data Bit 16
140
D17
I/O
Q
Ext. Bus Data Bit 17
141
D18
I/O
Q
Ext. Bus Data Bit 18
142
D19
I/O
Q
Ext. Bus Data Bit 19
143
D20
I/O
Q
Ext. Bus Data Bit 20
144
D21
I/O
Q
Ext. Bus Data Bit 21
145
D22
I/O
Q
Ext. Bus Data Bit 22
146
D23
I/O
Q
Ext. Bus Data Bit 23
147
D24
I/O
Q
Ext. Bus Data Bit 24
148
D25
I/O
Q
Ext. Bus Data Bit 25
149
D26
I/O
Q
Ext. Bus Data Bit 26
150
D27
I/O
Q
Ext. Bus Data Bit 27
151
D28
I/O
Q
Ext. Bus Data Bit 28
152
D29
I/O
Q
Ext. Bus Data Bit 29
153
D30
I/O
Q
Ext. Bus Data Bit 30
154
D31
I/O
Q
Ext. Bus Data Bit 31
155
VDD35
separated Ext. Bus VDD, 3.3 or 5.0 V
156
VSS
157
A0
I/O
Q
Ext. Bus Address Bit 0
158
A1
I/O
Q
Ext. Bus Address Bit 1
159
A2
I/O
Q
Ext. Bus Address Bit 2
160
A3
I/O
Q
Ext. Bus Address Bit 3
MB91360G Series
31
s
I/O CIRCUIT TYPE
(Continued)
Type
Circuit type
Remarks
A
I/O,
CMOS Automotive Schmitt-Trigger Input,
STOP control,
I
OH
=
4 mA, I
OL
=
4 mA
B
I/O,
CMOS Automotive Schmitt-Trigger Input,
Analog Input,
STOP control,
I
OH
=
4 mA, I
OL
=
4 mA
C
Analog output
D
Analog Input
P
N
R
Stop control
Digital input
Digital output
Digital output
V
SS
P
N
R
R
Stop control
Digital input
Analog input
Digital output
Digital output
V
SS
P
N
Analog output
V
SS
V
CC
P
N
R
Analog input
V
SS
V
CC
MB91360G Series
32
(Continued)
Type
Circuit type
Remarks
E
CMOS Schmitt-Trigger Input,
Pullup Resistor: 50 k
F
CMOS Schmitt-Trigger Input
G
Tristate Output,
I
OH
=
4 mA, I
OL
=
4 mA
H
4 MHz Oscillator Pin
P
N
R
Digital input
P
V
SS
V
SS
V
CC
V
CC
P
N
R
Digital input
V
SS
V
CC
P
N
Digital output
Digital output
V
SS
V
CC
Stop control
Clock input
X1
X0
MB91360G Series
33
(Continued)
Type
Circuit type
Remarks
I
32 kHz Oscillator Pin
J
I/O,
CMOS Automotive Schmitt-Trigger Input,
STOP control (LED) ,
I
OH
=
14 mA, I
OL
=
24 mA
K
I/O,
CMOS Automotive Schmitt-Trigger Input,
STOP control (SMC) ,
I
OH
=
30 mA, I
OL
=
30 mA
Typ slew rate of 40 ns
L
I/O,
CMOS Input: 5 V or 3 V input,
I
OH
=
4 mA, I
OL
=
4 mA
Stop control
Clock input
X1A
X0A
P
N
R
Stop control
Digital input
Digital output
Digital output
V
SS
P
N
R
Stop control
Digital input
Digital output
Digital output
V
SS
P
N
R
Digital input
Digital output
Digital output
V
SS
V
CC
MB91360G Series
34
(Continued)
Type
Circuit type
Remarks
M
I/O,
CMOS Automotive Schmitt-Trigger Input,
Analog Input, STOP control (SMC) ,
I
OH
=
30 mA, I
OL
=
30 mA
Typ slew rate of 40 ns
N
I/O,
CMOS Input,
Pulldown Resistor: 50 k
,
5 V or 3 V input,
I
OH
=
4 mA, I
OL
=
4 mA
O
CMOS Input,
Pulldown Resistor: 50 k
,
5 V or 3 V input
P
CMOS Input: 3 V input
P
N
R
R
Stop control
Digital input
Analog input
Digital output
Digital output
V
SS
P
N
R
Digital input
Digital output
Digital output
N
V
SS
V
CC
P
N
R
Digital input
N
V
SS
V
SS
V
CC
V
CC
P
N
R
Digital input
V
SS
V
CC
MB91360G Series
35
(Continued)
Type
Circuit type
Remarks
Q/Q1
Q : I/O CMOS Input,
STOP control,
I
OH
=
4 mA, I
OL
=
4 mA
Q1 : I/O CMOS Input,
STOP control,
I
OH
=
8 mA, I
OL
=
8 mA
S
I/O,
CMOS Schmitt-Trigger Input,
STOP control,
Pullup Resistor : 10 k
,
I
OH
=
4 mA, I
OL
=
4 mA
T
CMOS Input
can withstand high V
ID
for flash
programming
U
CMOS Schmitt-Trigger Input,
Pullup Resistor: 50 k
,
3 V and 5 V input to the core
P
N
R
Stop control
Digital input
Digital output
Digital output
V
SS
P
N
R
P
V
SS
V
CC
Digital output
Digital output
Digital input
Stop control
R
Control signal
MD Input
P
N
R
Digital input
P
V
SS
V
SS
V
CC
V
CC
MB91360G Series
36
(Continued)
Note : Symbols used in circuit types (Common to all circuit diagrams)
P : P channel transistor
N : N channel transistor
R : Diffusion resistor
Type
Circuit type
Remarks
V
I/O,
CMOS Schmitt-Trigger Input,
STOP control,
Pullup Resistor: 50 k
,,
I
OH
=
4 mA, I
OL
=
4 mA
W
I/O,
CMOS Input: 3 V input
X
Tristate Output, 3 V
Y
I/O CMOS Input,
STOP control,
I
OH
=
3 mA, I
OL
=
3 mA,
in I
2
C mode operating as open drain
outputs
P
N
R
P
V
SS
V
CC
Digital output
Digital output
Digital input
Stop control
P
N
R
Digital input
Digital output
Digital output
V
SS
3 V
P
N
Digital output
Digital output
V
SS
3 V
P
N
R
Stop control
Digital input
Digital output
Digital output
V
SS
MB91360G Series
37
Circuit
Type
Description
A
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Automotive Schmitt-Trigger Input, STOP control
B
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Automotive Schmitt-Trigger Input, Analog Input, STOP control
C
Analog Output
D
Analog Input
E
CMOS Schmitt-Trigger Input, Pull-up Resistor: 50 k
,
F
CMOS Schmitt-Trigger Input
G
Tristate Output, I
OH
=
4 mA
/
I
OL
=
4 mA
H
4 MHz Oscillator Pin
I
32 kHz Oscillator pin
J
I/O, I
OH
=
14 mA
/
I
OL
=
24 mA, CMOS Automotive Schmitt-Trigger Input, STOP control (LED)
K
I/O, I
OH
=
30 mA
/
I
OL
=
30 mA, CMOS Automotive Schmitt-Trigger Input, STOP control, slew rate
improved for EMC (SMC)
L
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Input: 5 V or 3 V input
M
I/O, I
OH
=
30 mA
/
I
OL
=
30 mA, CMOS Automotive Schmitt-Trigger Input, Analog Input, STOP control,
slew rate improved for EMC (SMC)
N
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Input : 5 V or 3 V input, Pulldown Resistor: 50 k
O
CMOS Input : 5 V or 3 V input, Pulldown Resistor: 50 k
P
CMOS Input: 3 V input
Q
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Input, STOP control
Q1
I/O, I
OH
=
8 mA
/
I
OL
=
8 mA, CMOS Input, STOP control
R
AVRL
/
AVRH Input
S
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Input, STOP control, Pull-up Resistor: 10 k
,
T
CMOS Input, can withstand V
ID
for flash programming
U
CMOS Schmitt-Trigger Input, Pull-up Resistor: 50 k
, 3.3 V and 5 V inputs to core
W
I/O, I
OH
=
4 mA
/
I
OL
=
4 mA, CMOS Input: 3 V input
X
Tristate Output, I
OH
=
4 mA
/
I
OL
=
4 mA, 3 V
Y
I/O, I
OH
=
3 mA
/
I
OL
=
3 mA (I
2
C) , CMOS Input, STOP control
MB91360G Series
38
s
HANDLING DEVICES
1.
Preventing latch-up
Latch-up may occur in a CMOS IC if a voltage greater than V
DD
or less than V
SS
is applied to an input or output
pin or if the voltage applied between V
DD
and V
SS
exceeds the rating. If latch-up occurs, the power supply current
increases rapidly resulting in thermal damage to circuit elements. Therefore, ensure that maximum ratings are
not exceeded in circuit operation.
2.
Connecting unused pins
Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of the
device. Therefore they must be tied to V
DD
or V
SS
through resistors. In this case those resistors should be more
than 2 KOhm.
Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above
described connection.
The resistor of more than 2 KOhm is used to limit currents through the protection diodes. In case of voltages at
the not used pin of 0.3 V or more below V
SS
or 0.3 V or more above V
DD
currents which could cause latch-up will
flow through those diodes.
3.
External reset input
When inputting an "L" level to the INITX pin, hold this low level at the INITX pin long enough so that after release
of the low level at INITX and the passing of the built in waiting time stable oscillation of the oscillation circuit is
achieved. INITX must be pulled low for at least 8 cycles of the 4 MHz oscillation clock.
4.
Power supply pins
All V
DD
pins should be connected to the same potential (exception can be the external bus interface on F362GA
and F369GA) . The analogue supply voltage (AV
CC
) must not be turned on before the digital supply voltage. If
the external bus interface is supplied with 3.3 V this voltage also must not be turned on before the 5 V digital
voltage has been switched on. If the supply voltage to the external bus interface is switched off (it may not be
tristate but should be pulled low) it must be made sure that all related signals do not have a voltage higher than
this pulled down supply.
When multiple V
DD
and V
SS
pins are provided, be sure to connect all V
DD
and V
SS
pins to the power supply or
ground externally. Although pins at the same potential are connected together in the internal device design so
as to prevent malfunctions such as latch-up, connecting all V
DD
and V
SS
pins appropriately minimizes unwanted
radiation, prevents malfunction of strobe signals due to increases in the ground level, and keeps the overall
output current rating.
Also, take care to connect V
DD
and V
SS
to current source in the lowest possible impedance.
Connection of a ceramic bypass capacitor of approximately 0.1
F between V
DD
and V
SS
close to the device is
recommended.
The MB91360G series contains a regulator. To use the device with the 5-V power supply, supply 5-V power to
the V
CC
pins and be sure to connect a bypass capacitor of 10
F parallel to 10 nF to the V
CC
3C pin for the regulator.
5 V
5 V
10
F
10 nF
V
CC
3C
V
CC
AV
CC
AVRH
AV
SS
V
SS
GND
[Use with 5-V power supply]
MB91360G Series
39
5.
Crystal oscillator circuit
Noise in the vicinity of the X0 and X1 pins can be a cause of device malfunction. Design the circuit board so that
X0, X1, the crystal oscillator (or ceramic oscillator) , and the bypass capacitor to ground are located as close to
the device as possible.
A printed circuit board design that surrounds the X0 and X1 pins with ground provides for stable operation and
is strongly recommended.
6.
Mode pins
Connect the mode pins (MD0 to MD2) directly to V
DD
or V
SS
.
To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to
minimize the distance from the mode pins to V
DD
or V
SS
and to provide a low-impedance connection.
7.
Turning the power supply on
Immediately after power on always execute INIT at the INITX pin (start with a low level at the INITX pin) . Hold
this low level at the INITX pin long enough so that after release of the low level at INITX and the passing of the
built in waiting time stable oscillation of the oscillation circuit is achieved. INITX must be pulled low for at least
8 cycles of the 4 MHz oscillation clock.
The analogue supply voltage (AV
CC
) must not be turned on before the digital supply voltage. If the external bus
interface is supplied with 3.3 V this voltage also must not be turned on before the 5 V digital voltage has been
switched on.
8.
A state in turning power on
As long as the minimum operating voltage has not been reached during power-on the output pin levels are not
guaranteed.
MB91360G Series
40
s
BLOCK DIAGRAM
32
32
32
16
32
32
Clock
Generation
FR50
Core
Watchdog
Timer
User RAM
D-bus
Bit Search
Module
DMA
Controller
Instruction
Cache/RAM
F-bus RAM
Bus
Converter
Boot ROM
2 KB
R-Bus
Adapter
SIO Prescaler/
SIO
U-Timer/
UART
Power Down
Reset
Subclock
Calibration
External Bus
Interface
CAN
DAC
ADC
External
Interrupt
Flash-
memory
I
2
C
Reload
Timer
ICU
LED
Sound
Generator
Alarm
Comparator
FreeRunning
Timer
Real Time
Clock
Voltage
regulator
OCU
Stepper Motor
Control
Prog. Pulse
Generator
External Bus
MB91360G Series
41
s
CPU CORE
1.
Memory Space
Internal memory area
00
:
0000
00
:
03FF
00
:
07FF
00
:
1000
00
:
1024
01
:
1000
01
:
1FFF
03
:
C000
03
:
FFFF
04
:
0000
04
:
3FFF
05
:
0000
05
:
07FF
08
:
0000
0F
:
4000
0F
:
FFFF
10
:
0000
128 K
128 K
128 K
64 K
16 K
16 K
32 K
CAN
Fixed Reset Vector
Bootsector
Flash Memory
on F-bus
Boot ROM
F-bus RAM
D-bus RAM
I-RAM
DMA
IO Area
Direct
Direct (short) addressing
0..0FF
:
Byte access
0..1FF
:
Halfword access (16 bit)
0..3FF
:
Word access (32 bit)
03
:
D000 - 03
:
FFFF on F362GA
04
:
0000 - 04
:
0FFF on F362GA
10
:
07FF
Addresses for CAN depend on set-
tings for the chip select areas CS7.
The addresses given here are valid
for the CS7 settings done in the Boot
ROM.
MB91360G Series
42
2.
Dedicated Registers
Each of the dedicated registers is used for a particular purpose. The dedicated registers consist of the program
counter (PC) , program status (PS) , table base register (TBR) , return pointer (RP) , system stack pointer (SS
P) , user stack pointer (USP) , and multiplication and division result registers (MDH/MDL) .
(1) Program status (PS)
PC
PS
TBR
RP
SSP
USP
MDH
MDL
XXXX XXXX
H
(Indeterminate)
XXXX XXXX
H
(Indeterminate)
XXXX XXXX
H
(Indeterminate)
XXXX XXXX
H
(Indeterminate)
XXXX XXXX
H
(Indeterminate)
0000 0000
H
000F FC00
H
32 bits
Program counter
Program status
Table base register
Return pointer
System stack pointer
User stack pointer
Multiplication and division
results resisters
Initial value
31
Bit position
20
16
ILM
SCR
CCR
10
7
8
0
CCR : Condition Code Register
SCR : System Condition Code Register
ILM : Interrupt Level Mask
MB91360G Series
43
(2) Condition Code Register (CCR)
(3) System Condition Code Register (SCR)
(4) Interrupt Level Mask Register (ILM)
(Bit)
Initial value
--00XXXX
B
7
6
5
4
3
2
1
0
S
I
N
Z
V
C
(Bit)
Initial value
XX0
B
10
9
8
D1
D0
T
(Bit)
Initial value
01111
B
20
19
18
17
16
ILM4 ILM3 ILM2 ILM1 ILM0
MB91360G Series
44
3.
General-Purpose Registers
The general-purpose registers are CPU registers R0 to R15. The register are used as the accumulator for
operations and as pointers (a field indicating an address) for memory access. The user can specify the purpose
for which the general-purpose registers are used.
Among 16 general-purpose registers, the following registers assume a special purpose. This enhances some
instructions.
The initial value of R0 to R14 after a reset is indeterminate. The initial value of R15 is 00000000
H
(SSP value) .
R13
: Virtual accumulator (AC)
R14
: Frame pointer (FP)
R15
: Stack pointer (SP)
R0
R1
R12
R13
R14
R15
AC (Accumulator)
FP (Frame Pointer)
SP (Stack Pointer)
XXXX XXXX
H
XXXX XXXX
H
0000 0000
H
32-bits
Initial value
Register bank structure
MB91360G Series
45
s
MODE SETTING
The FR50 series of devices uses mode pins (MD2 to MD0) and a mode register (MODR) to set the operation
mode.
(1) Mode Pins
Three mode pins (MD2 to MD0) are used to specify the reset mode vector access area.
(2) Mode Register (MODR)
The data to be written to 0000_7FDH using mode vector fetch is called mode data.
MODR is located at 0000_07FDH. After an operation mode has been set in MODR, the device operates in this
operation mode. MODR is set only when a reset factor (INIT level) occurs. User programs cannot write data to
MODR.
<
Mode Register (MODR)
>
[Bits 7 to 3] : (Reserved bits)
Always set 00000 at bits 7 to 3. Operation is not guaranteed when other values are set.
[Bit 2] : ROMA (internal ROM enable bit)
The ROMA bit is used to set whether to validate the internal ROM area (Fbus memory area) .
Mode Pins
Mode name
Reset vector
access area
Remarks
MD2
MD1
MD0
0
0
0
Internal ROM mode vector
Internal
0
0
1
External ROM mode vector
External
The mode register is used to set the bus
width.
remaining settings
Reserved
ROMA
Function
Remarks
0
External ROM mode
Access to the Fbus area is external.
1
Internal ROM mode
Address
Initial value
0000 07FD
H
XXXXXXXX
7
6
5
4
3
2
1
0
0
0
0
0
0
ROMA
WTH1
Operation mode setting bit
WTH0
MB91360G Series
46
[Bits 1 and 0] : WTH1 and WTH0 (bus width/single chip mode specifying bits)
The WTH1 and WTH0 bits are used to set the bus width (valid when operation mode is external bus mode) and
the single chip mode. When the operation mode is the external bus mode, this value is set at the BW1 and BW0
bits of AMD0 (CS0 area) .
(3) Fixed Vector
If MB91360 series devices are started in mode MD[2 : 0]
=
000, the internal fixed mode vector (FMV
=
0x06)
and the fixed reset vector are used. The fixed reset vector points to the start address of the internal Boot ROM.
This enables access to the F-bus area, to the internal CAN modules and the internal flash memory.
See also section Boot ROM.
WTH1
WTH0
Function
Remarks
0
0
8-bit bus width
External bus mode
0
1
16-bit bus width
External bus mode
1
0
32-bit bus width
External bus mode
1
1
Single chip mode
MB91360G Series
47
s
I/O MAP
How to Read the I/O Map
Read/Write attribute
Register initial value after a reset (bit initial values)
"1" : initial value "1", "0" : initial value "0",
"x" : initial value "X" (indeterminate) ,
"
" indicates non-existent bits
Register name (The register in column 1 is at location 4n, the register in
column 2 at 4n
+
1, and so on.)
Location of far left of register (
+
0) .
+
1
+
2, and
+
3 each increment the loca-
tion by one. When performing word access, the register in column 1 is
placed at the MSB end of the data.
Precautions :
Do not use RMW instructions on registers containing write-only (W) bits.
RMW instructions (RMW : read-modify-write)
AND Rj, @Ri OR Rj, @Ri EOR Rj, @Ri
ANDH Rj, @Ri ORH Rj, @Ri EORH Rj, @Ri
ANDB Rj, @Ri ORB Rj, @Ri EORB Rj, @Ri
BANDL #u4, @Ri BORL #u4, @Ri BEORL #u4, @Ri
BANDH #u4, @Ri BORH #u4, @Ri BEORH #u4, @Ri
The data in reserved areas and areas marked "
" is indeterminate. Do not use those ares !
Address
Register
Internal
peripheral
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000014
H
PDRG[R/W]
PDRH[R/W]
PDRI[R/W]
Port data register
XXXXXXXX
XXXXXXXX
- - - - XXXX
MB91360G Series
48
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000000
H
Reserved
Reserved
Reserved
Reserved
T-unit
Port Data
Register
000004
H
Reserved
Reserved
Reserved
PDR7 [R/W]
-111 - - - -
000008
H
PDR8 [R/W]
XXXXXXXX
PDR9 [R/W]
XXXXXXX1
PDRB [R/W]
- - - - - XXX
00000C
H
000010
H
PDRG [R/W]
XXXXXXXX
PDRH [R/W]
XXXXXXXX
PDRI [R/W]
X - - - X - - -
PDRJ [R/W]
XXXXXXXX
R-bus
Port Data
Register
000014
H
PDRK [R/W]
XXXXXXXX
PDRL [R/W]
XXXXXXXX
PDRM [R/W]
- - - - XXXX
PDRN [R/W]
- - XXXXXX
000018
H
PDRO [R/W]
XXXXXXXX
PDRP [R/W]
- - XXXXX
PDRQ [R/W]
- - XXXXX
PDRR [R/W]
XXXXXXXX
00001C
H
PDRS [R/W]
XXXXXXXX
000020
H
to
00003C
H
Reserved
000040
H
EIRR [R/W]
00000000
ENIR [R/W]
00000000
ELVR [R/W]
00000000 00000000
Ext int/NMI
000044
H
DICR [R/W]
- - - - - - - 0
HRCL [R/W, R]
0 - - 11111
CLKR2 [R/W]
- - - - - 000
reserved
DLYI/I-unit
RTC
000048
H
TMRLR0 [W]
XXXXXXXX XXXXXXXX
TMR0 [R]
XXXXXXXX XXXXXXXX
Reload Timer 0
00004C
H
TMCSR0 [R/W]
- - - - 0000 - - - 00000
000050
H
TMRLR1 [W]
XXXXXXXX XXXXXXXX
TMR1 [R]
XXXXXXXX XXXXXXXX
Reload Timer 1
000054
H
TMCSR1 [R/W]
- - - - 0000 - - - 00000
000058
H
TMRLR2 [W]
XXXXXXXX XXXXXXXX
TMR2 [R]
XXXXXXXX XXXXXXXX
Reload Timer 2
00005C
H
TMCSR2 [R/W]
- - - - 0000 - - - 00000
000060
H
SSR0 [R/W]
00001 - 00
SIDR0 [R/W]
XXXXXXXX
SCR0 [R/W, W]
00000100
SMR0 [R/W, W]
00 - - 0 - 0 -
UART0
000064
H
ULS0 [R/W]
- - - - 0000
MB91360G Series
49
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000068
H
UTIM0/UTIMR0 [R/W]
00000000 00000000
DRCL0 [W]
- - - - - - - -
UTIMC0 [R/W]
0 - - - 0 - 01
U-TIMER 0
00006C
H
SSR1 [R/W, R]
00001 - 00
SIDR1 [R/W]
XXXXXXXX
SCR1 [R/W, W]
00000100
SMR1 [R/W, W]
00 - - 0 - 0 -
UART1
000070
H
ULS1 [R/W]
- - - - 0000
000074
H
UTIM1/UTIMR1 [R/W]
00000000 00000000
DRCL1 [W]
- - - - - - - -
UTIMC1 [R/W]
0 - - - - - 01
U-TIMER 1
000078
H
SSR2 [R/W, R]
00001 - 00
SIDR2 [R/W]
XXXXXXXX
SCR2 [R/W, W]
00000100
SMR2 [R/W, W]
00 - - 0 - 0 -
UART2
00007C
H
ULS2 [R/W]
- - - - 0000
000080
H
UTIM2/UTIMR2 [R/W]
00000000 00000000
DRCL2 [W]
- - - - - - - -
UTIMC2 [R/W]
0 - - - 0 - 01
U-TIMER2
000084
H
SMCS0 [R/W, R]
00000010 - - - - 00-0
SES0 [R/W]
- - - - - - 00
SDR0 [R/W]
00000000
SIO 0
000088
H
SMCS1 [R/W, R]
00000010 - - - - 00 - 0
SES1 [R/W]
- - - - - - 00
SDR1 [R/W]
00000000
SIO 1
00008C
H
CDCR0 [R/W]
0 - - - 1111
Reserved
CDCR1 [R/W]
0 - - - 1111
Reserved
SIO 0/1
Prescaler
000090
H
Reserved
000094
H
IBCR [R/W]
00000000
IBSR [R]
00000000
IADR [R/W]
-XXXXXXX
ICCR [R/W]
- - 0XXXXX
I
2
C (old)
new I
2
C
from addr 0x184
000098
H
IDAR [R/W]
XXXXXXXX
IDBL [R/W]
- - - - - - - 0
00009C
H
ADMD [R/W, W]
- - - X0000
ADCH [R/W]
00000000
ADCS [R/W, W]
0000 - - 00
A/D Converter
0000A0
H
ADCD [R/W]
000000XX XXXXXXXX
ADBL [R/W]
- - - - - - - 0
0000A4
H
DACR [R/W]
- - - - - 000
DADR0 [R/W]
- - - - - - XX XXXXXXXX
DAC
0000A8
H
DADR1 [R/W]
- - - - - - XX XXXXXXXX
DDBL [R/W]
- - - - - - - 0
0000AC
H
IOTDBL0 [R/W]
- - - - - 000
ICS01 [R/W]
00000000
IOTDBL1 [R/W]
- - - - - 000
ICS23 [R/W]
00000000
Input Capture
0, 1, 2, 3
0000B0
H
IPCP0 [R]
XXXXXXXX XXXXXXXX
IPCP1 [R]
XXXXXXXX XXXXXXXX
0000B4
H
IPCP2 [R]
XXXXXXXX XXXXXXXX
IPCP3 [R]
XXXXXXXX XXXXXXXX
MB91360G Series
50
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
0000B8
H
OCS01 [R/W]
- - - 0 - - 00 0000 - - 00
reserved
Output Compare
0, 1, 2.3
0000BC
H
OCCP0 [R/W]
XXXXXXXX XXXXXXXX
OCCP1 [R/W]
XXXXXXXX XXXXXXXX
0000C0
H
OCCP2 [R/W]
XXXXXXXX XXXXXXXX
OCCP3 [R/W]
XXXXXXXX XXXXXXXX
0000C4
H
Reserved
0000C8
H
TCDT0 [R/W]
XXXXXXXX XXXXXXXX
TCCS0 [R/W]
- 0000000
Free Running
Counter 0 for
ICU/OCU
0000CC
H
TCDT1 [R/W]
XXXXXXXX XXXXXXXX
TCCS1 [R/W]
- 0000000
Free Running
Counter 1 for
ICU/OCU
0000D0
H
ZPD0 [R/W]
00000010
PWC0 [R/W]
- - 000 - - 0
ZPD1 [R/W]
00000010
PWC1 [R/W]
00000 - - 0
SMC 0, 1
0000D4
H
ZPD2 [R/W]
00000010
PWC2 [R/W]
- - 000 - - 0
ZPD3 [R/W]
00000010
PWC3 [R/W]
00000 - - 0
SMC 2, 3
0000D8
H
PWC20 [R/W]
XXXXXXXX
PWC10 [R/W]
XXXXXXXX
PWS20 [R/W]
- 0000000
PWS10 [R/W]
- - 000000
SMC 0
0000DC
H
PWC21 [R/W]
XXXXXXXX
PWC11 [R/W]
XXXXXXXX
PWS21 [R/W]
- 0000000
PWS11 [R/W]
- - 000000
SMC 1
0000E0
H
PWC22 [R/W]
XXXXXXXX
PWC12 [R/W]
XXXXXXXX
PWS22 [R/W]
- 0000000
PWS12 [R/W]
- - 000000
SMC 2
0000E4
H
PWC23 [R/W]
XXXXXXXX
PWC13 [R/W]
XXXXXXXX
PWS23 [R/W]
- 0000000
PWS13 [R/W]
- - 000000
SMC 3
0000E8
H
SMDBL0 [R/W]
- - - - - - - 0
SMDBL1 [R/W]
- - - - - - 0
SMDBL2 [R/W]
- - - - - - - 0
SMDBL3 [R/W]
- - - - - - - 0
SMC 0, 1, 2, 3
0000EC
H
SGDBL [R/W]
- - - - - - - 0
SGCR [R/W, R]
0 - - - - - 00 000 - - 000
Sound
generator
0000F0
H
SGAR [R/W]
00000000
SGFR [R/W]
XXXXXXXX
SGTR [R/W]
XXXXXXXX
SGDR [R/W]
XXXXXXXX
0000F4
H
WTDBL [R/W]
- - - - - - - 0
WTCR [R/W, R]
00000000 000 - 0000
Real Time Clock
(WatchTimer)
0000F8
H
WTBR [R/W]
- - XXXXXX XXXXXXXX XXXXXXXX
0000FC
H
WTHR [R/W]
- - - 00000
WTMR [R/W]
- - 000000
WTSR [R/W]
- - 000000
000100
H
TMRLR3 [W]
XXXXXXXX XXXXXXXX
TMR3 [R]
XXXXXXXX XXXXXXXX
Reload Timer 3
000104
H
TMCSR3 [R/W]
- - - - XX - - - - - XXXXX
MB91360G Series
51
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000108
H
TMRLR4 [W]
XXXXXXXX XXXXXXXX
TMR4 [R]
XXXXXXXX XXXXXXXX
Reload Timer 4
00010C
H
TMCSR4 [R/W]
- - - - XX - - - - - XXXXX
000110
H
TMRLR5 [W]
XXXXXXXX XXXXXXXX
TMR5 [R]
XXXXXXXX XXXXXXXX
Reload Timer 5
000114
H
TMCSR5 [R/W]
- - - - XX - - - - - XXXXX
000118
H
GCN10 [R/W]
00110010 00010000
PDBL0 [R/W]
- - - 00000
GCN20 [R/W]
- - - - 0000
PWM Control 0
00011C
H
GCN11 [R/W]
00110010 00010000
PDBL1 [R/W]
- - - 00000
GCN21 [R/W]
- - - - 0000
PWM Control 1
000120
H
PTMR0 [R]
11111111 11111111
PCSR0 [W]
XXXXXXXX XXXXXXXX
PWM0
000124
H
PDUT0 [W]
XXXXXXXX XXXXXXXX
PCNH0 [R/W]
0000000 -
PCNL0 [R/W]
000000 - 0
000128
H
PTMR1 [R]
11111111 11111111
PCSR1 [W]
XXXXXXXX XXXXXXXX
PWM1
00012C
H
PDUT1 [W]
XXXXXXXX XXXXXXXX
PCNH1 [R/W]
0000000 -
PCNL1 [R/W]
000000 - 0
000130
H
PTMR2 [R]
11111111 11111111
PCSR2 [W]
XXXXXXXX XXXXXXXX
PWM2
000134
H
PDUT2 [W]
XXXXXXXX XXXXXXXX
PCNH2 [R/W]
0000000 -
PCNL2 [R/W]
000000 - 0
000138
H
PTMR3 [R]
11111111 11111111
PCSR3 [W]
XXXXXXXX XXXXXXXX
PWM3
00013C
H
PDUT3 [W]
XXXXXXXX XXXXXXXX
PCNH3 [R/W]
0000000 -
PCNL3 [R/W]
000000 - 0
000140
H
PTMR4 [R]
11111111 11111111
PCSR4 [W]
XXXXXXXX XXXXXXXX
PWM4
000144
H
PDUT4 [W]
XXXXXXXX XXXXXXXX
PCNH4 [R/W]
0000000 -
PCNL4 [R/W]
000000 - 0
000148
H
PTMR5 [R]
11111111 11111111
PCSR5 [W]
XXXXXXXX XXXXXXXX
PWM5
00014C
H
PDUT5 [W]
XXXXXXXX XXXXXXXX
PCNH5 [R/W]
0000000 -
PCNL5 [R/W]
000000 - 0
000150
H
PTMR6 [R]
11111111 11111111
PCSR6 [W]
XXXXXXXX XXXXXXXX
PWM6
000154
H
PDUT 6 [W]
XXXXXXXX XXXXXXXX
PCNH6 [R/W]
0000000 -
PCNL6 [R/W]
000000 - 0
MB91360G Series
52
* : Old and new I
2
C share this bit.
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000158
H
PTMR7 [R]
11111111 11111111
PCSR7 [W]
XXXXXXXX XXXXXXXX
PWM7
00015C
H
PDUT7 [W]
XXXXXXXX XXXXXXXX
PCNH7 [R/W]
0000000 -
PCNL7 [R/W]
000000 - 0
000160
H
Reserved
000164
H
CMCR [R/W]
11111111 0000000
CMPR [R/W]
- - - -1001 1 - - -0001
Clock Modulation
000168
H
CMLS0 [R/W]
01110111 1111111
CMLS1 [R/W]
01110111 1111111
00016C
H
CMLS2 [R/W]
01110111 1111111
CMLS3 [R/W]
01110111 1111111
000170
H
CMLT0 [R/W, R]
- - - - -100 00000010
CMLT1 [R/W, R]
11110100 00000010
000174
H
CMLT2 [R/W]
- - - - -100 00000010
CMLT3 [R/W, R]
- - - - -100 00000010
000178
H
CMAC [R/W]
11111111 1111111
CMTS [R]
- -000001 01111111
00017C
H
PDRCR [R/W]
- - - - - 000
Power down reset
000180
H
ACCDBL[R/W]
- - - - - - - 0
ACSR [R/W, R]
- - - XXX00
Alarm comparator
000184
H
IBCR2 [R/W]
00000000
IBSR2 [R]
00000000
ITBAH [R/W]
- - - - - - 00
ITBAL [R/W]
00000000
I
2
C (new)
(*) old and new
I
2
C share this bit !
000188
H
ITMKH [R/W, R]
00 - - - - 11
ITMKL [R/W]
11111111
ISMK [R/W]
01111111
ISBA [R/W]
- 0000000
00018C
H
IDARH [-]
00000000
IDAR2 [R/W]
00000000
ICCR2 [R/W]
- 0011111
IDBL2 (*) [R/W]
- - - - - - - 0
000190
H
CUCR [R/W, R]
- - - - - - - - - - - 0 - -00
CUTD [R/W]
10000000 00000000
Calibration Unit of
32 kHz oscillator
000194
H
CUTR1 [R]
- - - - - - - - 00000000
CUTR2 [R]
00000000 00000000
000198
H
to
0001F8
H
Reserved
0001FC
H
F362MD [R/W]
00000000
F362
Mode Register
000200
H
DMACA0 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMAC
000204
H
DMACB0 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
MB91360G Series
53
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000208
H
DMACA1 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMAC
00020C
H
DMACB1 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000210
H
DMACA2 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000214
H
DMACB2 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000218
H
DMACA3 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
00021C
H
DMACB3 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000220
H
DMACA4 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000224
H
DMACB4 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000228
H
to
00023C
H
000240
H
DMACR [R/W]
00 - - 0000 - - - - - - - - - - - - - - - - - - - - - - - -
000244
H
to
0002FC
H
Reserved
000300
H
IRBS [R/W, R]
00000000 00000001 00100000 - - - - - - - -
Instruction Cache
000304
H
ISIZE [R/W]
- - - - - -11
000308
H
to
0003E0
H
Reserved
0003E4
H
ICHRC [R/W]
0-000000
Instruction Cache
0003E8
H
to
0003EC
H
Reserved
MB91360G Series
54
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
0003F0
H
BSD0 [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
Bit Search
Module
0003F4
H
BSD1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0003F8
H
BSDC [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0003FC
H
BSRR [R]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000400
H
DDRG [R/W]
00000000
DDRH [R/W]
00000000
DDRI [R/W]
- - - -0- - -
DDRJ [R/W]
00000000
R-bus
Port Direction
Register
000404
H
DDRK [R/W]
00000000
DDRL [R/W]
00000000
DDRM [R/W]
- - - -0000
DDRN [R/W]
- -000000
000408
H
DDRO [R/W]
00000000
DDRP [R/W]
- - - -0000
DDRQ [R/W]
- -000000
DDRR [R/W]
00000000
00040C
H
DDRS [R/W]
00000000
000410
H
PFRG [R/W]
00000000
PFRH [R/W]
00000000
PFRI [R/W]
- - - -0- - -
PFRJ [R/W]
00000000
R-bus
Port Function
Register
000414
H
PFRK [R/W]
00000000
PFRL [R/W]
00000000
PFRM [R/W]
- - - -0000
PFRN [R/W]
- -000000
000418
H
PFRO [R/W]
00000000
PFRP [R/W]
00000000
PFRQ [R/W]
- -000000
PFRR [R/W]
00000000
00041C
H
PFRS [R/W]
00000000
000420
H
to
00043C
H
Reserved
000440
H
ICR00 [R/W, R]
- - -11111
ICR01 [R/W, R]
- - -11111
ICR02 [R/W, R]
- - -11111
ICR03 [R/W, R]
- - -11111
Interrupt Control
unit
000444
H
ICR04 [R/W, R]
- - -11111
ICR05 [R/W, R]
- - -11111
ICR06 [R/W, R]
- - -11111
ICR07 [R/W, R]
- - -11111
000448
H
ICR08 [R/W, R]
- - -11111
ICR09 [R/W, R]
- - -11111
ICR10 [R/W, R]
- - -11111
ICR11 [R/W, R]
- - -11111
00044C
H
ICR12 [R/W, R]
- - -11111
ICR13 [R/W, R]
- - -11111
ICR14 [R/W, R]
- - -11111
ICR15 [R/W, R]
- - -11111
000450
H
ICR16 [R/W, R]
- - -11111
ICR17 [R/W, R]
- - -11111
ICR18 [R/W, R]
- - -11111
ICR19 [R/W, R]
- - -11111
000454
H
ICR20 [R/W, R]
- - -11111
ICR21 [R/W, R]
- - -11111
ICR22 [R/W, R]
- - -11111
ICR23 [R/W, R]
- - -11111
000458
H
ICR24 [R/W, R]
- - -11111
ICR25 [R/W, R]
- - -11111
ICR26 [R/W, R]
- - -11111
ICR27 [R/W, R]
- - -11111
MB91360G Series
55
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
00045C
H
ICR28 [R/W, R]
- - -11111
ICR29 [R/W, R]
- - -11111
ICR30 [R/W, R]
- - -11111
ICR31 [R/W, R]
- - -11111
Interrupt Control
unit
000460
H
ICR32 [R/W, R]
- - -11111
ICR33 [R/W, R]
- - -11111
ICR34 [R/W, R]
- - -11111
ICR35 [R/W, R]
- - -11111
000464
H
ICR36 [R/W, R]
- - -11111
ICR37 [R/W, R]
- - -11111
ICR38 [R/W, R]
- - -11111
ICR39 [R/W, R]
- - -11111
000468
H
ICR40 [R/W, R]
- - -11111
ICR41 [R/W, R]
- - -11111
ICR42 [R/W, R]
- - -11111
ICR43 [R/W, R]
- - -11111
00046C
H
ICR44 [R/W, R]
- - -11111
ICR45 [R/W, R]
- - -11111
ICR46 [R/W, R]
- - -11111
ICR47 [R/W, R]
- - -11111
000470
H
to
00047C
H
Reserved
000480
H
RSRR [R/W, R]
10000000
STCR [R/W]
00110011
TBCR [R/W]
X0000X00
CTBR [W]
XXXXXXXX
Clock Control unit
000484
H
CLKR [R/W]
00000000
WPR [W]
XXXXXXXX
DIVR0 [R/W]
00000011
DIVR1 [R/W]
00000000
000488
H
to
0005FC
H
Reserved
000600
H
T-unit
Port Direction
Register
000604
H
DDR7 [R/W]
00000000
000608
H
DDR8 [R/W]
00000000
DDR9 [R/W]
00000000
DDRB [R/W]
00000000
00060C
H
000610
H
T-unit
Port Function
Register
000614
H
PFR7 [R/W]
00001111
000618
H
PFR8 [R/W]
111110-0
PFR9 [R/W]
11110101
PFRB [R/W]
00000000
00061C
H
000620
H
000624
H
PFR27 [R/W]
1111-00-
000628
H
to
00063F
H
Reserved
MB91360G Series
56
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000640
H
ASR0 [W]
00000000 00000000
AMR0 [W]
11111000 11111111
T-unit
000644
H
ASR1 [W]
00000000 00000000
AMR1 [W]
00000000 00000000
000648
H
ASR2 [W]
00000000 00000000
AMR2 [W]
00000000 00000000
00064C
H
ASR3 [W]
00000000 00000000
AMR3 [W]
00000000 00000000
000650
H
ASR4 [W]
00000000 00000000
AMR4 [W]
00000000 00000000
000654
H
ASR5 [W]
00000000 00000000
AMR5 [W]
00000000 00000000
000658
H
ASR6 [W]
00000000 00000000
AMR6 [W]
00000000 00000000
00065C
H
ASR7 [W]
00000000 00000000
AMR7 [W]
00000000 00000000
000660
H
AMD0 [R/W]
-00XX111
AMD1 [R/W]
-XXXXXXX
AMD2 [R/W]
-
-XXXXXX
AMD3 [R/W]
-
-XXXXXX
000664
H
AMD4 [R/W]
-
-XXXXXX
AMD5 [R/W]
-
-XXXXXX
AMD6 [R/W]
-XXXXXXX
AMD7 [R/W]
-XXXXXXX
000668
H
CSE
11000011
00066C
H
000670
H
CHE
11111111
000674
H
to
0007F8
H
Reserved
0007FC
H
MODR [W]
XXXXXXXX
Mode Register
000800
H
to
000AFC
H
Reserved
MB91360G Series
57
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000B00
H
ESTS0
X0000000
ESTS1
XXXXXXXX
ESTS2
XXXXXXXX
DSU
000B04
H
ECTL0
0X000000
ECTL1
00000000
ECTL2
000X0000
ECTL3
00000X11
000B08
H
ECNT0
XXXXXXXX
ECNT1
XXXXXXXX
EUSA
XXX0000X
EDTC
0000XXXX
000B0C
H
EWPT
XXXXXXXX XXXXXXXX
000B10
H
EDTR0
XXXXXXXX XXXXXXXX
EDTR1
XXXXXXXX XXXXXXXX
000B14
H
to
000B1C
H
000B20
H
EIA0
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B24
H
EIA1
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B28
H
EIA2
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B2C
H
EIA3
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B30
H
EIA4
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B34
H
EIA5
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B38
H
EIA6
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B3C
H
EIA7
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B40
H
EDTA
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B44
H
EDTM
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B48
H
EOA0
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B4C
H
EOA1
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B50
H
EPCR
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B54
H
EPSR
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
MB91360G Series
58
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
000B58
H
EIAM0
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DSU
000B5C
H
EIAM1
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B60
H
EOAM0/EODM0
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B64
H
EOAM1/EODM1
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B68
H
EOD0
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000B6C
H
EOD1
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001000
H
DMASA0 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMAC
001004
H
DMADA0 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001008
H
DMASA1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00100C
H
DMADA1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001010
H
DMASA2 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001014
H
DMADA2 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001018
H
DMASA3 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00101C
H
DMADA3 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001020
H
DMASA4 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001024
H
DMADA4 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001028
H
to
003FFC
H
Reserved
004000
H
to
006FFF
H
Reserved
MB91360G Series
59
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
007000
H
FMCS [R/W]
1110X000
Flash Memory
Control
Register
007004
H
FMWT [R/W]
- -000011
007008
H
to
00FFFC
H
Reserved
010000
H
to
010FFC
H
(for exact address range see chapter about I-cache)
on F362GA and F369GA no cache, but 4 K I-RAM are available
I-Cache 4 KB
011000
H
to
011FFC
H
Reserved
012000
H
to
01FFFC
H
Reserved
020000
H
to
03BFFC
H
Reserved
03C000
H
to
03FFFC
H
Only first 12 KB are available on F362GA
User RAM
16 KB
(D-Bus)
040000
H
to
043FFC
H
Only first 4 K are available on F362GA
Fast RAM
16 KB
(F-Bus)
044000
H
to
0FEFFC
Reserved
050000
H
to
0507FC
H
Boot ROM
2 KB
(F-Bus)
050800
H
to
07FFF4
H
reserved
MB91360G Series
60
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
080000
H
to
09FFFC
H
Sector 0
64 KB
Sector 7
64 KB
Flash Memory
512 K
on F-Bus
0A0000
H
to
0BFFFC
Sector 1
64 KB
Sector 8
64 KB
0C0000
H
to
0DFFFC
Sector 2
64 KB
Sector 9
64 KB
0E0000
H
to
0EFFFC
Sector 3
32 KB
Sector 10
32 KB
0F0000
H
to
0F3FFC
H
Sector 4
8 KB
Sector 11
8 KB
0F4000
H
to
0F7FFC
H
Sector 5
8 KB
Sector 12
8 KB
0F8000
H
to
0FFFF4
H
Sector 6
16 KB
Sector 13
16 KB
0FFFF8
H
FMV [R]
06 00 00 00
H
Fixed
Reset/Mode
Vector
0FFFFC
H
FRV [R]
00 05 00 00
H
Write operations to address 0FFFF8
H
and 0FFFFC
H
are not possible. When reading these addresses, the values
shown above will be read.
MB91360G Series
61
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
100000
H
BVALR0 [R/W]
00000000 00000000
TREQR0 [R/W]
00000000 00000000
CAN 0
Remark :
Address range for
CAN 0 to CAN 3
depends on chip
select range.
Mentioned
addresses are
default values,
determined by
boot ROM
contents.
100004
H
TCANR0 [W]
00000000 00000000
TCR0 [R/W]
00000000 00000000
100008
H
RCR0 [R/W]
00000000 00000000
RRTRR0 [R/W]
00000000 00000000
10000C
H
ROVRR0 [R/W]
00000000 00000000
RIER0 [R/W]
00000000 00000000
100010
H
CSR0 [R/W, R]
00000000 00000001
LEIR0 [R/W]
000-0000
100014
H
RTEC0 [R]
00000000 00000000
BTR0 [R/W]
-1111111 11111111
100018
H
IDER0 [R/W]
XXXXXXXX XXXXXXXX
TRTRR0 [R/W]
00000000 00000000
10001C
H
RFWTR0 [R/W]
XXXXXXXX XXXXXXXX
TIER0 [R/W]
00000000 00000000
100020
H
AMSR0 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100024
H
AMR00 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100028
H
AMR10 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10002C
H
to
100048
H
GENERAL PURPOSE RAM [R/W]
10004C
H
IDR00 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100050
H
IDR10 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100054
H
IDR20 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100058
H
IDR30 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10005C
H
IDR40 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100060
H
IDR50 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100064
H
IDR60 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100068
H
IDR70 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
CAN 0
MB91360G Series
62
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
10006C
H
IDR80 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
CAN 0
100070
H
IDR90 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100074
H
IDR100 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100078
H
IDR110 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10007C
H
IDR120 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100080
H
IDR130 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100084
H
IDR140 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100088
H
IDR150 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10008C
H
DLCR00 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR10 [R/W]
- - - - - - - - -
-
-
-
XXXX
100090
H
DLCR20 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR30 [R/W]
- - - - - - - - -
-
-
-
XXXX
100094
H
DLCR40 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR50 [R/W]
- - - - - - - - -
-
-
-
XXXX
100098
H
DLCR60 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR70 [R/W]
- - - - - - - - -
-
-
-
XXXX
10009C
H
DLCR80 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR90 [R/W]
- - - - - - - - -
-
-
-
XXXX
1000A0
H
DLCR100 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR110 [R/W]
- - - - - - - - -
-
-
-
XXXX
1000A4
H
DLCR120 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR130 [R/W]
- - - - - - - - -
-
-
-
XXXX
1000A8
H
DLCR140 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR150 [R/W]
- - - - - - - - -
-
-
-
XXXX
1000AC
H
DTR00 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000B4
H
DTR10 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000BC
H
DTR20 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
MB91360G Series
63
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
1000C4
H
DTR30 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
CAN 0
1000CC
H
DTR40 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000D4
H
DTR50 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000DC
H
DTR60 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000E4
H
DTR70 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000EC
H
DTR80 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000F4
H
DTR90 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1000FC
H
DTR100 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100104
H
DTR110 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
10010C
H
DTR120 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100114
H
DTR130 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
10011C
H
DTR140 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100124
H
DTR150 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
10012C
H
CREG0 [R/W]
00000000 00000110
MB91360G Series
64
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
100200
H
BVALR1 [R/W]
00000000
00000000
TREQR1 [R/W]
00000000
00000000
CAN 1
Remark :
Address range for
CAN 0 to CAN 3
depends on chip
select range.
Mentioned
addresses are
default values,
determined by
boot ROM
contents.
100204
H
TCANR1 [W]
00000000 00000000
TCR1 [R/W]
00000000 00000000
100208
H
RCR1 [R/W]
00000000 00000000
RRTRR1 [R/W]
00000000 00000000
10020C
H
ROVRR1 [R/W]
00000000 00000000
RIER1 [R/W]
00000000 00000000
100210
H
CSR1 [R/W, R]
00000000 00000001
LEIR1 [R/W]
000-0000
100214
H
RTEC1 [R]
00000000 00000000
BTR1 [R/W]
-1111111 11111111
100218
H
IDER1 [R/W]
XXXXXXXX XXXXXXXX
TRTRR1 [R/W]
00000000 00000000
10021C
H
RFWTR1 [R/W]
XXXXXXXX XXXXXXXX
TIER1 [R/W]
00000000 00000000
100220
H
AMSR1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100224
H
AMR01 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100228
H
AMR11 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10022C
H
to
100248
H
GENERAL PURPOSE RAM [R/W]
10024C
H
IDR01 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100250
H
IDR11 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100254
H
IDR21[R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100258
H
IDR31 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX-
10025C
H
IDR41 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100260
H
IDR51 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100264
H
IDR61 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
MB91360G Series
65
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
100268
H
IDR71 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
CAN 1
10026C
H
IDR81 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100270
H
IDR91 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100274
H
IDR101 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100278
H
IDR111 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10027C
H
IDR121 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXX
-
-
-
100280
H
IDR131 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100284
H
IDR141 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
100288
H
IDR151 [R/W]
XXXXXXXX XXXXXXXX XXXXX
-
-
- XXXXXXXX
10028C
H
DLCR01 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR11 [R/W]
- - - - - - - - -
-
-
-
XXXX
100290
H
DLCR21 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR31 [R/W]
- - - - - - - - -
-
-
-
XXXX
100294
H
DLCR41 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR51 [R/W]
- - - - - - - - -
-
-
-
XXXX
100298
H
DLCR61 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR71 [R/W]
- - - - - - - - -
-
-
-
XXXX
10029C
H
DLCR81[R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR91 [R/W]
- - - - - - - - -
-
-
-
XXXX
1002A0
H
DLCR101 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR111 [R/W]
- - - - - - - - -
-
-
-
XXXX
1002A4
H
DLCR121 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR131 [R/W]
- - - - - - - - -
-
-
-
XXXX
1002A8
H
DLCR141 [R/W]
- - - - - - - - -
-
-
-
XXXX
DLCR151 [R/W]
- - - - - - - - -
-
-
-
XXXX
1002AC
H
DTR01 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
MB91360G Series
66
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
1002B4
H
DTR11 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
CAN 1
1002BC
H
DTR21 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002C4
H
DTR31 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002CC
H
DTR41 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002D4
H
DTR51 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002DC
H
DTR61 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002E4
H
DTR71 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002EC
H
DTR81 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002F4
H
DTR91 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
1002FC
H
DTR101 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100304
H
DTR111 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
10030C
H
DTR121 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
100314
H
DTR131 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
10031C
H
DTR141 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
MB91360G Series
67
(Continued)
Address
Register
Block
+
+
+
+
0
+
+
+
+
1
+
+
+
+
2
+
+
+
+
3
100324
H
DTR151 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
CAN 1
10032C
H
CREG1 [R/W]
00000000 00000110
100400
H
BVALR2 [R/W]<