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Datasheet: 100302PC (Fairchild Semiconductor)

Low Power Quint 2-Input OR/NOR Gate

 

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Fairchild Semiconductor
2000 Fairchild Semiconductor Corporation
DS010580
www.fairchildsemi.com
August 1989
Revised August 2000
1
00302 Low
Power Quint

2-
Inp
u
t O
R
/
N
OR
Gate
100302
Low Power Quint 2-Input OR/NOR Gate
General Description
The 100302 is a monolithic quint 2-input OR/NOR gate with
common enable. All inputs have 50 k
pull-down resistors
and all outputs are buffered.
Features
s
43% power reduction of the 100102
s
2000V ESD protection
s
Pin/function compatible with 100102
s
Voltage compensated operating range
=
-
4.2V to
-
5.7V
s
Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
Pin Descriptions
Order Number
Package Number
Package Description
100302SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100302PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100302QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100302QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
-
40
C to
+
85
C)
Pin Names
Description
D
na
D
ne
Data Inputs
E
Enable Input
O
a
O
e
Data Outputs
O
a
O
e
Complementary Data Outputs
www.fairchildsemi.com
2
100302
Logic Symbol
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
D
1X
D
2X
E
O
X
O
X
L
L
L
L
H
L
L
H
H
L
L
H
L
H
L
L
H
H
H
L
H
L
L
H
L
H
L
H
H
L
H
H
L
H
L
H
H
H
H
L
3
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1
00302
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics
(Note 3)
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND, T
C
=
0
C to
+
85
C
Note 3: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under "worst case" conditions.
DIP AC Electrical Characteristics
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND
Note 4: The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching.
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Maximum Junction Temperature (T
J
)
+
150
C
V
EE
Pin Potential to Ground Pin
-
7.0V to
+
0.5V
Input Voltage (DC)
V
EE
to
+
0.5V
Output Current (DC Output HIGH)
-
50 mA
ESD (Note 2)
2000V
Case Temperature (T
C
)
Commercial
0
C to
+
85
C
Industrial
-
40
C to
+
85
C
Supply Voltage (V
EE
)
-
5.7V to
-
4.2V
Symbol
Parameter
Min
Typ
Max
Units
Conditions
V
OH
Output HIGH Voltage
-
1025
-
955
-
870
mV
V
IN
=
V
IH(Max)
or V
IL(Min)
Loading with
V
OL
Output LOW Voltage
-
1830
-
1705
-
1620
mV
50
to
-
2.0V
V
OHC
Output HIGH Voltage
-
1035
mV
V
IN
=
V
IH(Min)
or V
IL(Max)
Loading with
V
OLC
Output LOW Voltage
-
1610
mV
50
to
-
2.0V
V
IH
Input HIGH Voltage
-
1165
-
870
mV
Guaranteed HIGH Signal for All Inputs
V
IL
Input LOW Voltage
-
1830
-
1475
mV
Guaranteed LOW Signal for All Inputs
I
IL
Input LOW Current
0.50
A
V
IN
=
V
IL(Min)
I
IH
Input HIGH Current
240
A
V
IN
=
V
IH(Max)
I
EE
Power Supply Current
-
45
-
36
-
20
mA
Inputs OPEN
Symbol
Parameter
T
C
=
0
C
T
C
=
+
25
C
T
C
=
+
85
C
Units
Conditions
Min
Max
Min
Max
Min
Max
t
PLH
Propagation Delay
0.50
1.15
0.50
1.15
0.50
1.25
ns
t
PHL
Data to Output
Figures 1, 2
t
PLH
Propagation Delay
0.70
1.90
0.70
1.90
0.80
2.00
ns
(Note 4)
t
PHL
Enable to Output
t
TLH
Transition Time
0.40
1.20
0.40
1.20
0.40
1.20
ns
Figures 1, 2
t
THL
20% to 80%, 80% to 20%
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4
100302
Commercial Version
(Continued)
SOIC and PLCC AC Electrical Characteristics
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching.
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t
OSHL
), or LOW-to-HIGH (t
OSLH
), or in opposite
directions both HL and LH (t
OST
). Parameters t
OST
and t
PS
guaranteed by design.
Symbol
Parameter
T
C
=
0
C
T
C
=
+
25
C
T
C
=
+
85
C
Units
Conditions
Min
Max
Min
Max
Min
Max
t
PLH
Propagation Delay
0.50
1.05
0.50
1.05
0.50
1.15
ns
t
PHL
Data to Output
Figures 1, 2
t
PLH
Propagation Delay
0.70
1.80
0.70
1.80
0.80
1.90
ns
(Note 5)
t
PHL
Enable to Output
t
TLH
Transition Time
0.40
1.10
0.40
1.10
0.40
1.10
ns
Figures 1, 2
t
THL
20% to 80%, 80% to 20%
t
OSHL
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
250
250
250
ps
(Note 6)
Data to Output Path
t
OSHL
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
310
310
310
ps
(Note 6)
Enable to Output Path
t
OSLH
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
200
200
200
ps
(Note 6)
Data to Output Path
t
OSLH
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
330
330
330
ps
(Note 6)
Enable to Output Path
t
OST
Maximum Skew Opposite Edge
PLCC Only
Output-to-Output Variation
250
250
250
ps
(Note 6)
Data to Output Path
t
OST
Maximum Skew Opposite Edge
PLCC Only
Output-to-Output Variation
330
330
330
ps
((Note 6)
Enable to Output Path
t
PS
Maximum Skew
PLCC Only
Pin (Signal) Transition Variation
200
200
200
ps
(Note 6)
Data to Output Path
t
PS
Maximum Skew
PLCC Only
Pin (Signal) Transition Variation
280
280
280
ps
(Note 6)
Enable to Output Path
5
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1
00302
Industrial Version
PLCC DC Electrical Characteristics
(Note 7)
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND, T
C
=
-
40
C to
+
85
C
Note 7: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under the "worst case" conditions.
PLCC AC Electrical Characteristics
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND
Note 8: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching.
Symbol
Parameter
T
C
=
-
40
C
T
C
=
0
C to
+
85
C
Units
Conditions
Min
Max
Min
Max
V
OH
Output HIGH Voltage
-
1085
-
870
-
1025
-
870
mV
V
IN
=
V
IH(Max)
Loading with
V
OL
Output LOW Voltage
-
1830
-
1575
-
1830
-
1620
or V
IL(Min)
50
to
-
2.0V
V
OHC
Output HIGH Voltage
-
1095
-
1035
mV
V
IN
=
V
IH(Min)
Loading with
V
OLC
Output LOW Voltage
-
1565
-
1610
or V
IL(Max)
50
to
-
2.0V
V
IH
Input HIGH Voltage
-
1170
-
870
-
1165
-
870
mV
Guaranteed HIGH Signal for ALL Inputs
V
IL
Input LOW Voltage
-
1830
-
1480
-
1830
-
1475
mV
Guaranteed LOW Signal for ALL Inputs
I
IL
Input LOW Current
0.05
0.05
A
V
IN
=
V
IL(Min)
I
IH
Input HIGH Current
300
240
A
V
IN
=
V
IH(Max)
I
EE
Power Supply Current
-
45
-
20
-
45
-
20
mA
Inputs OPEN
Symbol
Parameter
T
C
=
-
40
C
T
C
=
+
25
C
T
C
=
+
85
C
Units
Conditions
Min
Max
Min
Max
Min
Max
t
PLH
Propagation Delay
0.40
1.05
0.50
1.05
0.50
1.15
ns
Figures 1, 2
(Note 8)
t
PHL
Data to Output
t
PLH
Propagation Delay
0.70
1.80
0.70
1.80
0.80
1.90
ns
t
PHL
Enable to Output
t
TLH
Transition Time
0.30
1.10
0.40
1.10
0.40
1.10
ns
Figures 1, 2
t
THL
20% to 80%, 80% to 20%
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