HTML datasheet архив (поиск документации на электронные компоненты) Поиск даташита (1.687.043 компонентов)
Где искать

Datasheet: F0321818B (Eudyna Devices Inc.)

2 Ghz Bandwidth Limiting Amplifier

 

Скачать: PDF   ZIP
Eudyna Devices Inc.
Features
+5 or -5 V single power supply
20 dB typical gain
2.0 GHz typical -3 dB cutoff frequency
On-chip matching to 50
55 mA typical operating current
Differential input and output
Differential ECL compatible input
Applications
Post-amplifier of an optical receiver circuit up to 2.5 Gb/s
Logic gate buffer to interface between analog circuit and logic circuit
Functional Description
The F0321818B is a stable GaAs integrated limiting amplifier for use in a post-amplifier
of an optical receiver circuit up to 2.5 Gb/s. The F0321818B typically specifies a small signal
gain of 20 dB (Rs=RL=50
) with a 3 dB-cutoff-frequency of 2.0 GHz. It features single +5 or
-5 V supply operation, excellent VSWR's of 1.1:1, and a typical dissipation current of 55 mA.
The F0321818B can be also used as interface circuits in sensing systems and measure-
ment instruments. Emitter coupled logic (ECL) or source coupled FET logic (SCFL) circuits
are the most popular IC's for high speed digital circuits; the F0321818B operating under a
differential ECL compatible input condition is the best choice as the interface IC to join ana-
log circuits to ECL circuits or conventional GaAs logic IC's.
02.04.24
Limiting Amplifier
F0321818B
2 GHz Bandwidth
F0321818B
2 GHz Limiting Amplifier
Absolute Maximum Ratings
T
a
=25
C, unless specified
Recommended Operating Conditions
V
SS
= GND
Electrical Characteristics
T
a
= 25
C, V
DD
= +5 V, V
SS
= GND, unless specified
Parameter
Symbol
Value
Units
Supply Voltage
Supply Current
Input Voltage Swing (AC)
Output Voltage
Ambient Operating Temperature
Storage Temperature
V
DD
I
DD
V
IN+
, V
OUT-
V
OUT+
, V
OUT-
T
a
T
stg
V
SS
-0.5 to V
SS
+7
80
1
V
DD
-2.5 to V
DD
0 to +70
-55 to +125
V
mA
V
V
C
C
Parameter
Symbol
Test Conditions
Value
Units
Min.
Typ.
Max.
Supply Current
Input Bias Point
Output bias Point
VSWR (IN, OUT)
Gain
-3dB High Frequency Cutoff
Maximum Output Swing (single output)
I
DD
V
IN
V
OUT
SWR
GV
Fc
Vom
Pin=-40dBm
Pin=-40dBm f=1MHz
Pin=-40dBm
RL=50
f=1MHz
Pin=-40dBm
RL=50
RL=50
-
-
-
-
18
-
0.4
55
1.5
3.5
1.1
20
2.0
0.6
70
-
-
1.8
-
-
0.8
mA
V
V
-
dB
GHz
V
r
e
t
e
m
a
r
a
P
l
o
b
m
y
S
e
u
l
a
V
s
ti
n
U
.
n
i
M
.
p
y
T
.
x
a
M
e
g
a
tl
o
V
y
l
p
p
u
S
V
D
D
5
7
.
4
5
6
4
.
5
V
d
a
o
L
d
e
l
p
u
o
C
C
A
L
R
-
0
5
-
e
r
u
t
a
r
e
p
m
e
T
g
n
it
a
r
e
p
O
t
n
e
i
b
m
A
T
a
0
5
2
0
7
C
2 GHz Limiting Amplifier
F0321818B
Block Diagram
Dia Descriptions
V
DD
V
SS
V
OUT-
V
OUT+
V
IN+
V
IN-
LPF-
LPF+
Amp.
Amp.
Output
Buffer
V
IN+
LPF+
V
IN-
LPF-
V
OUT+
V
OUT-
V
SS1
V
SS2
V
DD
V
DD
Input
AC Ground
Input
AC Ground
Output
Output
Supply Voltage
Supply Voltage
Supply Voltage
Supply Voltage
F0321818B
2 GHz Limiting Amplifier
Dia Pad Assignments
*
V
DD1
is not connected to V
DD2
in the bare chip IC.
*
V
SS1
is not connected to V
SS2
in the bare chip IC.
*
For +5 V users, we recommended the Pads of No.16,17 are connected to power supply pads (+5 V) and
the pads of No. 6, 9,15,18 are connected to GND pads.
*
We recommend that unused input pin should be terminated to GND via coupling capacitor and 50 ohm
load.
Example : (unused input pin)
(coupling capacitor)
(50 ohm load)
(GND)
*
On the back of the bare die, we mount it on GND but no problem for mounted on V
SS
.
.
o
N
l
o
b
m
y
S
)
m
(
s
e
t
a
n
i
d
r
o
o
C
r
e
t
n
e
C
.
o
N
l
o
b
m
y
S
)
m
(
s
e
t
a
n
i
d
r
o
o
C
r
e
t
n
e
C
)
1
(
V
2
D
D
)
0
8
,
0
6
1
(
)
1
1
(
V
-
N
I
)
0
3
3
1
,
0
9
6
(
)
2
(
V
+
T
U
O
)
0
8
,
0
9
3
(
)
2
1
(
V
1
D
D
)
0
3
3
1
,
0
4
5
(
)
3
(
V
2
D
D
)
0
8
,
0
4
5
(
)
3
1
(
V
+
N
I
)
0
3
3
1
,
0
9
3
(
)
4
(
V
-
T
U
O
)
0
8
,
0
9
6
(
)
4
1
(
+
F
P
L
)
0
3
3
1
,
0
6
1
(
)
5
(
V
2
D
D
)
0
8
,
0
2
9
(
)
5
1
(
V
1
S
S
)
0
9
0
1
,
0
8
(
)
6
(
V
2
S
S
)
0
2
3
,
0
0
0
1
(
)
6
1
(
V
1
D
D
)
0
8
7
,
0
8
(
)
7
(
V
2
D
D
)
0
5
5
,
0
0
0
1
(
)
7
1
(
V
2
D
D
)
0
7
4
,
0
8
(
)
8
(
V
1
D
D
)
0
8
7
,
0
0
0
1
(
)
8
1
(
V
2
S
S
)
0
4
2
,
0
8
(
)
9
(
V
1
S
S
)
0
9
0
1
,
0
0
0
1
(
O
)
0
,
0
(
)
0
1
(
-
F
P
L
)
0
3
3
1
,
0
2
9
(
A
)
0
1
4
1
,
0
8
0
1
(
2 GHz Limiting Amplifier
F0321818B
Test Circuits
*
*
50
50
1) AC Characteristics
F0321818B
LPF-
V
SS
V
IN-
V
OUT-
LPF+
V
DD
V
DD
V
IN+
V
OUT+
0.1
F
0.1
F
0.1
F
Pin =-40dBm
2200
pF
Vector
Network
Analyzer
50
50
2) Limiting Characteristics
*
*
*
*
50
50
50
LPF-
V
SS
V
IN-
V
OUT-
LPF+
V
DD
V
DD
V
IN+
V
OUT+
0.1
F
0.1
F
0.1
F
2200
pF
Pulse
Pattern
Generator
Attenuator
Sampling
Oscilloscope
DATA
CLOCK
* DC BLOCK (PICOSECIND PULSE LABS, MODEL 5501)
F0321818B
© 2017 • ChipFind
Контакты
Главная страница